Milad Bahadori

Orcid: 0000-0002-2964-2504

According to our database1, Milad Bahadori authored at least 10 papers between 2016 and 2021.

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Bibliography

2021
FPGA Implementations of 256-Bit SNOW Stream Ciphers for Postquantum Mobile Security.
IEEE Trans. Very Large Scale Integr. Syst., 2021

Speed Reading in the Dark: Accelerating Functional Encryption for Quadratic Functions with Reprogrammable Hardware.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

2020
A Programmable SoC-Based Accelerator for Privacy-Enhancing Technologies and Functional Encryption.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Compact and Programmable yet High-Performance SoC Architecture for Cryptographic Pairings.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

A Programmable SoC Implementation of the DGK Cryptosystem for Privacy-Enhancing Technologies.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2017
RoBA Multiplier: A Rounding-Based Approximate Multiplier for High-Speed yet Energy-Efficient Digital Signal Processing.
IEEE Trans. Very Large Scale Integr. Syst., 2017

CL-CPA: A hybrid carry-lookahead/carry-propagate adder for low-power or high-performance operation mode.
Integr., 2017

An energy and area efficient yet high-speed square-root carry select adder structure.
Comput. Electr. Eng., 2017

2016
High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels.
IEEE Trans. Very Large Scale Integr. Syst., 2016

A comparative study on performance and reliability of 32-bit binary adders.
Integr., 2016


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