Mikio Yoneyama
According to our database1,
Mikio Yoneyama
authored at least 7 papers
between 1997 and 2013.
Collaborative distances:
Collaborative distances:
Timeline
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2012
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2013
Small and Low-Cost Dual-Rate Optical Triplexer for OLT Transceivers in 10G/1G Co-existing 10G-EPON Systems.
IEICE Trans. Electron., 2013
10 Gb/s BOSA Employing Low-Cost TO CAN Package and Impedance Matching Circuits in Transmitter.
IEICE Trans. Electron., 2013
2004
A 39-to-45-Gbit/s multi-data-rate clock and data recovery circuit with a robust lock detector.
IEEE J. Solid State Circuits, 2004
1999
IEEE J. Solid State Circuits, 1999
1998
IEEE J. Solid State Circuits, 1998
1997
A super-dynamic flip-flop circuit for broad-band applications up to 24 Gb/s utilizing production-level 0.2-μm GaAs MESFETs.
IEEE J. Solid State Circuits, 1997
IEEE J. Solid State Circuits, 1997