Mikel Azkarate-askatsua
Orcid: 0000-0003-4146-8921Affiliations:
- IK4-IKERLAN, Arrasate/Mondragòn, Spain
According to our database1,
Mikel Azkarate-askatsua
authored at least 28 papers
between 2009 and 2021.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2021
Legacy software migration based on timing contract aware real-time execution environments.
J. Syst. Softw., 2021
2020
Proceedings of the RAPIDO 2020 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2020
Proceedings of the 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2020
2019
SAFEPOWER: Application of Power Management Techniques in SoCs for Safety-Relevant Systems.
Proceedings of the International Conference on Omni-Layer Intelligent Systems, 2019
2018
Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262.
IEEE Trans. Reliab., 2018
Real-Time Capable Retargeting of Xilinx MicroBlaze Binaries using QEMU: A Feasibility Study.
Proceedings of the RAPIDO 2018 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2018
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
2017
SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems.
Microprocess. Microsystems, 2017
On the tailoring of CAST-32A certification guidance to real COTS multicore architectures.
Proceedings of the 12th IEEE International Symposium on Industrial Embedded Systems, 2017
Proceedings of the 15th IEEE International Conference on Industrial Informatics, 2017
Proceedings of the Reliable Software Technologies - Ada-Europe 2017, 2017
2016
Mitigating Software-Instrumentation Cache Effects in Measurement-Based Timing Analysis.
Proceedings of the 16th International Workshop on Worst-Case Execution Time Analysis, 2016
Automotive Safety Concept Definition for Mixed-Criticality Integration on a COTS Multicore.
Proceedings of the Computer Safety, Reliability, and Security, 2016
SAFEPOWER Project: Architecture for Safe and Power-Efficient Mixed-Criticality Systems.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
2015
Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015
Temporal independence validation of an IEC-61508 compliant mixed-criticality system based on multicore partitioning.
Proceedings of the 2015 Forum on Specification and Design Languages, 2015
IEC-61508 SIL 3 Compliant Pseudo-Random Number Generators for Probabilistic Timing Analysis.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015
A Safety Concept for a Railway Mixed-Criticality Embedded System Based on Multicore Partitioning.
Proceedings of the 15th IEEE International Conference on Computer and Information Technology, 2015
2011
Proceedings of the Ninth Workshop on Intelligent Solutions in Embedded Systems, 2011
Suitability of Hypervisor and MPSoC Architectures for the Execution Environment of an Integrated Embedded System.
Proceedings of the 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2011
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011
2010
Proceedings of the International Conference on Field-Programmable Technology, 2010
Evolutionary Dynamic Allocation of Relocatable Modules onto Partially Damaged Xilinx FPGAs.
Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2010
Codesign and Simulated Fault Injection of Safety-Critical Embedded Systems Using SystemC.
Proceedings of the Eighth European Dependable Computing Conference, 2010
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010
2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009