Mike Tripp

According to our database1, Mike Tripp authored at least 9 papers between 2001 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2009
The Challenges of Nanotechnology and Gigacomplexity.
IEEE Des. Test Comput., 2009

2005
Drive only at speed functional testing; one of the techniques Intel is using to control test costs.
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

2004
Testing Gbps Interfaces without a Gigahertz Tester.
IEEE Des. Test Comput., 2004

ITC 2004 Panel: Cost of Test - Taking Control.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Design considerations and DFT to enable testing of digital interfaces.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003
Elimination of Traditional Functional Testing of Interface Timings at Intel.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

2002
On-Die DFT Based Solutions are Sufficient for Testing Multi-GHz Interfaces in Manufacturing (and Are Also Key to Enabling Lower Cost ATE Platforms).
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Realizing the Benefits of Structural Test for Intel Microprocessors.
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

2001
Reliability Beyond GHz.
Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001


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