Mike Hensley

According to our database1, Mike Hensley authored at least 4 papers between 2000 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2010
A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration.
IEEE J. Solid State Circuits, 2010

A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2004
A dual channel IF-digitizing IC with 117dB dynamic range at 300Mhz IF for EDGE/GSM base-stations [receiver].
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2000
A 14-bit 100-Msample/s subranging ADC.
IEEE J. Solid State Circuits, 2000


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