Mijo Kim
According to our database1,
Mijo Kim
authored at least 5 papers
between 2008 and 2018.
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Bibliography
2018
A 16Gb LPDDR4X SDRAM with an NBTI-tolerant circuit solution, an SWD PMOS GIDL reduction technique, an adaptive gear-down scheme and a metastable-free DQS aligner in a 10nm class DRAM process.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2012
A 1.2V 30nm 1.6Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2011
A 100 MHz-to-1 GHz Fast-Lock Synchronous Clock Generator With DCC for Mobile Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2011
2010
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
2008
IEEE J. Solid State Circuits, 2008