Mihalis Psarakis

According to our database, Mihalis Psarakis authored at least 76 papers between 1997 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Considerations on LAMDA Controller With BB-BC Tuning Toward Hardware Implementation.

Almabrok Abdoalnasir, Mihalis Psarakis, Anastasios I. Dounis

IEEE Trans. Ind. Informatics, November, 2024

Single Event Effects Assessment of UltraScale+ MPSoC Systems Under Atmospheric Radiation.

Dimitris Agiakatsikas, Nikos Foutris, Aitzan Sari, Vasileios Vlagkoulis, Ioanna Souvatzoglou, Mihalis Psarakis, Ruiqi Ye, John Goodacre, Mikel Luján, Maria Kastriotou, Carlo Cazzaniga, Chris Frost

IEEE Trans. Reliab., March, 2024

An Effective TMR Approach for Low-Latency Configurable-Accuracy Adders.

Ioannis Tsounis, Dimitris Agiakatsikas, Mihalis Psarakis

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

An Enhanced Fault Injection Framework for FPGA-Based Soft-Cores.

Tijmen T. Smit, Bruno E. Forlin, Kuan-Hsun Chen, Ioanna Souvatzoglou, Mihalis Psarakis, Marco Ottavi

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

Automated Hardware Security Countermeasure Integration Inside High Level Synthesis.

Amalia-Artemis Koufopoulou, Athanasios Papadimitriou, Mihalis Psarakis, David Hély

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023

A Methodology for Fault-tolerant Pareto-optimal Approximate Designs of FPGA-based Accelerators.

Ioannis Tsounis, Dimitris Agiakatsikas, Mihalis Psarakis

ACM Trans. Embed. Comput. Syst., July, 2023

Impact of Voltage Scaling on Soft Errors Susceptibility of Multicore Server CPUs.

Dimitris Agiakatsikas, George Papadimitriou, Vasileios Karakostas, Dimitris Gizopoulos, Mihalis Psarakis, Camille Bélanger-Champagne, Ewart Blackmore

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

Detecting Hardware Faults in Approximate Adders via Minimum Redundancy.

Ioannis Tsounis, Dimitris Agiakatsikas, Mihalis Psarakis

Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

On the Prediction of Hardware Security Properties of HLS Designs Using Graph Neural Networks.

Amalia-Artemis Koufopoulou, Athanasios Papadimitriou, Aggelos Pikrakis, Mihalis Psarakis, David Hély

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

2022

Evaluation of Xilinx Deep Learning Processing Unit under Neutron Irradiation.

Dimitris Agiakatsikas, Nikos Foutris, Aitzan Sari, Vasileios Vlagkoulis, Ioanna Souvatzoglou, Mihalis Psarakis, Mikel Luján, Maria Kastriotou, Carlo Cazzaniga

CoRR, 2022

Security and Reliability Evaluation of Countermeasures implemented using High-Level Synthesis.

Amalia-Artemis Koufopoulou, Kalliopi Xevgeni, Athanasios Papadimitriou, Mihalis Psarakis, David Hély

Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022

The Impact of Hardware Folding on Dependability in Spaceborne FPGA-based Neural Networks.

Ioanna Souvatzoglou, Dimitris Agiakatsikas, George Antonopoulos, Vasileios Vlagkoulis, Aitzan Sari, Athanasios Papadimitriou, Mihalis Psarakis

Proceedings of the International Conference on Field-Programmable Technology, 2022

Evaluation of Hiding-based Countermeasures against Deep Learning Side Channel Attacks with Pre-trained Networks.

Konstantinos Nomikos, Athanasios Papadimitriou, Mihalis Psarakis, Aggelos Pikrakis, Vincent Beroulle

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022

2021

Analyzing the Impact of Approximate Adders on the Reliability of FPGA Accelerators.

Ioannis Tsounis, Athanasios Papadimitriou, Mihalis Psarakis

Proceedings of the 26th IEEE European Test Symposium, 2021

Analyzing the Single Event Upset Vulnerability of Binarized Neural Networks on SRAM FPGAs.

Ioanna Souvatzoglou, Athanasios Papadimitriou, Aitzan Sari, Vasileios Vlagkoulis, Mihalis Psarakis

Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021

2020

An FPGA-Based Accelerated Optimization Algorithm for Real-Time Applications.

Mihalis Psarakis, Anastasios I. Dounis, Almabrok Abdoalnasir, Stavros Stavrinidis, Georgios Gkekas

J. Signal Process. Syst., 2020

Scrubbing-Aware Placement for Reliable FPGA Systems.

Aitzan Sari, Mihalis Psarakis

IEEE Trans. Emerg. Top. Comput., 2020

On a Security-oriented Design Framework for Medical IoT Devices: The Hardware Security Perspective.

Konstantinos Nomikos, Athanasios Papadimitriou, George Stergiopoulos, Dimitris Koutras, Mihalis Psarakis, Panayiotis Kotzanikolaou

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

You can detect but you cannot hide: Fault Assisted Side Channel Analysis on Protected Software-based Block Ciphers.

Athanasios Papadimitriou, Konstantinos Nomikos, Mihalis Psarakis, Ehsan Aerabi, David Hély

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

2019

Guest Editorial Special Issue on Secure Embedded IoT Devices for Resilient Critical Infrastructures.

Cristina Alcaraz, Mike Burmester, Jorge Cuéllar, Xinyi Huang, Panayiotis Kotzanikolaou, Mihalis Psarakis

IEEE Internet Things J., 2019

Analyzing the Resilience to SEUs of an Image Data Compression Core in a COTS SRAM FPGA.

Ioannis Tsounis, Antonis Tsigkanos, Vasileios Vlagkoulis, Mihalis Psarakis, Nektarios Kranitis, Antonis M. Paschalis

Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2019

Advanced Persistent Threats and Zero-Day Exploits in Industrial Internet of Things.

Ioannis Stellios, Panayiotis Kotzanikolaou, Mihalis Psarakis

Proceedings of the Security and Privacy Trends in the Industrial Internet of Things, 2019

2018

A Survey of IoT-Enabled Cyberattacks: Assessing Attack Paths to Critical Infrastructures and Services.

Ioannis Stellios, Panayiotis Kotzanikolaou, Mihalis Psarakis, Cristina Alcaraz, Javier López

IEEE Commun. Surv. Tutorials, 2018

Fast Tuning of the PID Controller in An HVAC System Using the Big Bang-Big Crunch Algorithm and FPGA Technology.

Almabrok Abdoalnasir, Mihalis Psarakis, Anastasios I. Dounis

Algorithms, 2018

An Efficient FPGA Implementation of the Big Bang-Big Crunch Optimization Algorithm.

Almabrok Abdoalnasir, Mihalis Psarakis, Anastasios I. Dounis

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017

A Flexible Fault Injection Platform for the Analysis of the Symptoms of Soft Errors in FPGA Soft Processors.

Aitzan Sari, Mihalis Psarakis

J. Circuits Syst. Comput., 2017

A scrubbing scheduling approach for reliable FPGA multicore processors with real-time constraints.

Mihalis Psarakis, Aitzan Sari

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

2016

Reliability-Aware Overlay Architectures for FPGAs: Features and Design Challenges.

Mihalis Psarakis

CoRR, 2016

A fault injection platform for the analysis of soft error effects in FPGA soft processors.

Aitzan Sari, Mihalis Psarakis

Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

2014

Accelerated online error detection in many-core microprocessor architectures.

Manolis Kaliorakis, Mihalis Psarakis, Nikos Foutris, Dimitris Gizopoulos

Proceedings of the 32nd IEEE VLSI Test Symposium, 2014

A soft error vulnerability analysis framework for Xilinx FPGAs.

Aitzan Sari, Dimitris Agiakatsikas, Mihalis Psarakis

Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

Design and implementation of a self-healing processor on SRAM-based FPGAs.

Mihalis Psarakis, Alexandros Vavousis, Cristiana Bolchini, Antonio Miele

Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

2013

A Fault Tolerant Approach for FPGA Embedded Processors Based on Runtime Partial Reconfiguration.

Alexandros Vavousis, Andreas Apostolakis, Mihalis Psarakis

J. Electron. Test., 2013

Combining checkpointing and scrubbing in FPGA-based real-time systems.

Aitzan Sari, Mihalis Psarakis, Dimitris Gizopoulos

Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Online error detection in multiprocessor chips: A test scheduling study.

Manolis Kaliorakis, Nikos Foutris, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis

Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013

2012

FPGA-based Acceleration for Tracking Audio Effects in Movies.

Mihalis Psarakis, Aggelos Pikrakis, Giannis Dendrinos

Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

Fault tolerant FPGA processor based on runtime reconfigurable modules.

Mihalis Psarakis, Andreas Apostolakis

Proceedings of the 17th IEEE European Test Symposium, 2012

2011

Chip Self-Organization and Fault Tolerance in Massively Defective Multicore Arrays.

Jacques Henri Collet, Piotr Zajac, Mihalis Psarakis, Dimitris Gizopoulos

IEEE Trans. Dependable Secur. Comput., 2011

Accelerating microprocessor silicon validation by exposing ISA diversity.

Nikos Foutris, Dimitris Gizopoulos, Mihalis Psarakis, Xavier Vera, Antonio González

Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011

Scrubbing-based SEU mitigation approach for Systems-on-Programmable-Chips.

Aitzan Sari, Mihalis Psarakis

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

Architectures for online error detection and recovery in multicore processors.

Dimitris Gizopoulos, Mihalis Psarakis, Sarita V. Adve, Pradeep Ramachandran, Siva Kumar Sastry Hari, Daniel J. Sorin, Albert Meixner, Arijit Biswas, Xavier Vera

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Microprocessor Software-Based Self-Testing.

Mihalis Psarakis, Dimitris Gizopoulos, Edgar E. Sánchez, Matteo Sonza Reorda

IEEE Des. Test Comput., 2010

MT-SBST: Self-test optimization in multithreaded multicore architectures.

Nikos Foutris, Mihalis Psarakis, Dimitris Gizopoulos, Andreas Apostolakis, Xavier Vera, Antonio González

Proceedings of the 2011 IEEE International Test Conference, 2010

2009

Instruction-Based Online Periodic Self-Testing of Microprocessors with Floating-Point Units.

George Xenoulis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis

IEEE Trans. Dependable Secur. Comput., 2009

Software-Based Self-Testing of Symmetric Shared-Memory Multiprocessors.

Andreas Apostolakis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis

IEEE Trans. Computers, 2009

Test Program Generation for Communication Peripherals in Processor-Based SoC Devices.

Andreas Apostolakis, Dimitris Gizopoulos, Mihalis Psarakis, Danilo Ravotto, Matteo Sonza Reorda

IEEE Des. Test Comput., 2009

Enhanced self-configurability and yield in multicore grids.

Eleftherios Kolonis, Michael Nicolaidis, Dimitris Gizopoulos, Mihalis Psarakis, Jacques Henri Collet, Piotr Zajac

Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

Exploiting Thread-Level Parallelism in Functional Self-Testing of CMT Processors.

Andreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Ishwar Parulkar

Proceedings of the 14th IEEE European Test Symposium, 2009

2008

Systematic Software-Based Self-Test for Pipelined Processors.

Dimitris Gizopoulos, Mihalis Psarakis, Miltiadis Hatzimihail, Michail Maniatakos, Antonis M. Paschalis, Anand Raghunathan, Srivaths Ravi

IEEE Trans. Very Large Scale Integr. Syst., 2008

Functional Self-Testing for Bus-Based Symmetric Multiprocessors.

Andreas Apostolakis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis

Proceedings of the Design, Automation and Test in Europe, 2008

2007

Functional Processor-Based Testing of Communication Peripherals in Systems-on-Chip.

Andreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

IEEE Trans. Very Large Scale Integr. Syst., 2007

A methodology for detecting performance faults in microprocessors via performance monitoring hardware.

Miltiadis Hatzimihail, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

Proceedings of the 2007 IEEE International Test Conference, 2007

A Functional Self-Test Approach for Peripheral Cores in Processor-Based SoCs.

Andreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

On-Line Periodic Self-Testing of High-Speed Floating-Point Units in Microprocessors.

George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

2006

Testability Analysis and Scalable Test Generation for High-Speed Floating-Point Units.

George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

IEEE Trans. Computers, 2006

A Low-Cost SEU Fault Emulation Platform for SRAM-Based FPGAs.

P. Kenterlis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis

Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

Systematic software-based self-test for pipelined processors.

Mihalis Psarakis, Dimitris Gizopoulos, Miltiadis Hatzimihail, Antonis M. Paschalis, Anand Raghunathan, Srivaths Ravi

Proceedings of the 43rd Design Automation Conference, 2006

2005

Built-in sequential fault self-testing of array multipliers.

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Test Generation Methodology for High-Speed Floating Point Adders.

George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

Software-Based Self-Test for Pipelined Processors: A Case Study.

Miltiadis Hatzimihail, Mihalis Psarakis, George Xenoulis, Dimitris Gizopoulos, Antonis M. Paschalis

Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

2003

Easily Testable Cellular Carry Lookahead Adders.

Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian

J. Electron. Test., 2003

2001

Αποδοτικές τεχνικές ελέγχου ορθής λειτουργίας επαναληπτικών διατάξεων λογικής σε τεχνολογία CMOS VLSI

Mihalis Psarakis

PhD thesis, 2001

An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths.

Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis, Yervant Zorian

J. Electron. Test., 2001

Robust and Low-Cost BIST Architectures for Sequential Fault Testing in Datapath Multipliers.

Mihalis Psarakis, Antonis M. Paschalis, Nektarios Kranitis, Dimitris Gizopoulos, Yervant Zorian

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

Deterministic software-based self-testing of embedded processor cores.

Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Yervant Zorian

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000

Sequential Fault Modeling and Test Pattern Generation for CMOS Iterative Logic Arrays.

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian

IEEE Trans. Computers, 2000

Power-/Energy Efficient BIST Schemes for Processor Data Paths.

Nektarios Kranitis, Dimitris Gizopoulos, Antonis M. Paschalis, Mihalis Psarakis, Yervant Zorian

IEEE Des. Test Comput., 2000

Low Power/Energy BIST Scheme for Datapaths.

Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Deterministic Built-In Self -Test for Shifters, Adders and ALUs in Datapaths.

Mihalis Psarakis, Nektarios Kranitis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian

Proceedings of the 1st Latin American Test Workshop, 2000

Effective Low Power BIST for Datapaths.

Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian

Proceedings of the 2000 Design, 2000

1999

An Effective BIST Architecture for Sequential Fault Testing in Array Multipliers.

Mihalis Psarakis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

An Effective BIST Architecture for Fast Multiplier Cores.

Antonis M. Paschalis, Nektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Yervant Zorian

Proceedings of the 1999 Design, 1999

1998

Test Generation and Fault Simulation for Cell Fault Model using Stuck-at Fault Model based Test Tools.

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis

J. Electron. Test., 1998

Robustly Testable Array Multipliers under Realistic Sequential Cell Fault Model.

Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian

Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

1997

Robust Sequential Fault Testing of Iterative Logic Arrays.

Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

An Effective BIST Scheme for Arithmetic Logic Units.

Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian, Mihalis Psarakis

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997