Mihalis Psarakis
Orcid: 0000-0002-5359-619X
According to our database1,
Mihalis Psarakis
authored at least 73 papers
between 1997 and 2024.
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Bibliography
2024
Single Event Effects Assessment of UltraScale+ MPSoC Systems Under Atmospheric Radiation.
IEEE Trans. Reliab., March, 2024
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024
2023
A Methodology for Fault-tolerant Pareto-optimal Approximate Designs of FPGA-based Accelerators.
ACM Trans. Embed. Comput. Syst., July, 2023
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023
On the Prediction of Hardware Security Properties of HLS Designs Using Graph Neural Networks.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023
2022
CoRR, 2022
Security and Reliability Evaluation of Countermeasures implemented using High-Level Synthesis.
Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022
The Impact of Hardware Folding on Dependability in Spaceborne FPGA-based Neural Networks.
Proceedings of the International Conference on Field-Programmable Technology, 2022
Evaluation of Hiding-based Countermeasures against Deep Learning Side Channel Attacks with Pre-trained Networks.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022
2021
Proceedings of the 26th IEEE European Test Symposium, 2021
Analyzing the Single Event Upset Vulnerability of Binarized Neural Networks on SRAM FPGAs.
Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021
2020
J. Signal Process. Syst., 2020
IEEE Trans. Emerg. Top. Comput., 2020
On a Security-oriented Design Framework for Medical IoT Devices: The Hardware Security Perspective.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020
You can detect but you cannot hide: Fault Assisted Side Channel Analysis on Protected Software-based Block Ciphers.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020
2019
Guest Editorial Special Issue on Secure Embedded IoT Devices for Resilient Critical Infrastructures.
IEEE Internet Things J., 2019
Analyzing the Resilience to SEUs of an Image Data Compression Core in a COTS SRAM FPGA.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2019
Proceedings of the Security and Privacy Trends in the Industrial Internet of Things, 2019
2018
A Survey of IoT-Enabled Cyberattacks: Assessing Attack Paths to Critical Infrastructures and Services.
IEEE Commun. Surv. Tutorials, 2018
Fast Tuning of the PID Controller in An HVAC System Using the Big Bang-Big Crunch Algorithm and FPGA Technology.
Algorithms, 2018
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018
2017
A Flexible Fault Injection Platform for the Analysis of the Symptoms of Soft Errors in FPGA Soft Processors.
J. Circuits Syst. Comput., 2017
A scrubbing scheduling approach for reliable FPGA multicore processors with real-time constraints.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017
2016
CoRR, 2016
A fault injection platform for the analysis of soft error effects in FPGA soft processors.
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016
2014
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014
2013
A Fault Tolerant Approach for FPGA Embedded Processors Based on Runtime Partial Reconfiguration.
J. Electron. Test., 2013
Proceedings of the 31st IEEE VLSI Test Symposium, 2013
Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 2013
2012
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012
Proceedings of the 17th IEEE European Test Symposium, 2012
2011
IEEE Trans. Dependable Secur. Comput., 2011
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Proceedings of the 2011 IEEE International Test Conference, 2010
2009
Instruction-Based Online Periodic Self-Testing of Microprocessors with Floating-Point Units.
IEEE Trans. Dependable Secur. Comput., 2009
IEEE Trans. Computers, 2009
Test Program Generation for Communication Peripherals in Processor-Based SoC Devices.
IEEE Des. Test Comput., 2009
Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009
Proceedings of the 14th IEEE European Test Symposium, 2009
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
A methodology for detecting performance faults in microprocessors via performance monitoring hardware.
Proceedings of the 2007 IEEE International Test Conference, 2007
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007
2006
Testability Analysis and Scalable Test Generation for High-Speed Floating-Point Units.
IEEE Trans. Computers, 2006
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006
Proceedings of the 43rd Design Automation Conference, 2006
2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005
2003
2001
Αποδοτικές τεχνικές ελέγχου ορθής λειτουργίας επαναληπτικών διατάξεων λογικής σε τεχνολογία CMOS VLSI
PhD thesis, 2001
J. Electron. Test., 2001
Robust and Low-Cost BIST Architectures for Sequential Fault Testing in Datapath Multipliers.
Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
2000
Sequential Fault Modeling and Test Pattern Generation for CMOS Iterative Logic Arrays.
IEEE Trans. Computers, 2000
IEEE Des. Test Comput., 2000
Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000
Deterministic Built-In Self -Test for Shifters, Adders and ALUs in Datapaths.
Proceedings of the 1st Latin American Test Workshop, 2000
1999
Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999
Proceedings of the 1999 Design, 1999
1998
Test Generation and Fault Simulation for Cell Fault Model using Stuck-at Fault Model based Test Tools.
J. Electron. Test., 1998
Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998
1997
Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997
Proceedings of the Proceedings IEEE International Test Conference 1997, 1997