Miguel O. Arias-Estrada

Orcid: 0000-0002-8000-9501

Affiliations:
  • National Institute of Astrophysics, Optics and Electronics (INAOE), Mexico


According to our database1, Miguel O. Arias-Estrada authored at least 67 papers between 1996 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2021
Real-time multi-window stereo matching algorithm with fuzzy logic.
IET Comput. Vis., 2021

A Variable Sampling-Time Method for Elliptical Orbit Motion Prediction in Nanosatellites.
IEEE Access, 2021

2019
Depth from a Motion Algorithm and a Hardware Architecture for Smart Cameras.
Sensors, 2019

The fastest visual ego-motion algorithm in the west.
Microprocess. Microsystems, 2019

An FPGA 2D-convolution unit based on the CAPH language.
J. Real Time Image Process., 2019

Towards Embedded Heterogeneous FPGA-GPU Smart Camera Architectures for CNN Inference.
Proceedings of the 13th International Conference on Distributed Smart Cameras, 2019

2018
Robust feature extraction algorithm suitable for real-time embedded applications.
J. Real Time Image Process., 2018

2017
Improving visual vocabularies: a more discriminative, representative and compact bag of visual words.
Informatica (Slovenia), 2017

GPU-based Visual Odometry for Autonomous Vehicle Applications.
Proceedings of the 11th International Conference on Distributed Smart Cameras, 2017

Deep Learning Pulsed-based Convolutional Neuroprocessor Architecture on FPGAs.
Proceedings of the 11th International Conference on Distributed Smart Cameras, 2017

Camera Pose Estimation Suitable for Smart Cameras.
Proceedings of the 11th International Conference on Distributed Smart Cameras, 2017

Dense Feature Matching Core for FPGA-based Smart Cameras.
Proceedings of the 11th International Conference on Distributed Smart Cameras, 2017

2016
An FPGA stereo matching unit based on fuzzy logic.
Microprocess. Microsystems, 2016

I Want to Change My Floor: Dominant Plane Recognition from a Single Image to Augment the Scene.
Proceedings of the 2016 IEEE International Symposium on Mixed and Augmented Reality, 2016

Enhancing 3D Mapping via Real-Time Superpixel-based Segmentation.
Proceedings of the 2016 IEEE International Symposium on Mixed and Augmented Reality, 2016

Dense mapping for monocular-SLAM.
Proceedings of the International Conference on Indoor Positioning and Indoor Navigation, 2016

Dominant plane recognition in interior scenes from a single image.
Proceedings of the 23rd International Conference on Pattern Recognition, 2016

Towards a smart camera for monocular SLAM.
Proceedings of the 10th International Conference on Distributed Smart Camera, 2016

An FPGA Stereo Matching Processor Based on the Sum of Hamming Distances.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

2015
Algoritmo evolutivo paralelo para aplicaciones en tomografía sísmica.
Res. Comput. Sci., 2015

Morphological Filtering Algorithm for Restoring Images Contaminated by Impulse Noise.
Computación y Sistemas, 2015

An FPGA Correlation-Edge Distance approach for disparity map.
Proceedings of the 25. International Conference on Electronics, 2015

Assessing the Distinctiveness and Representativeness of Visual Vocabularies.
Proceedings of the Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, 2015

2014
Sequential application of viscous opening and lower leveling for three-dimensional brain extraction on magnetic resonance imaging T1.
J. Electronic Imaging, 2014

LISF: An Invariant Local Shape Features Descriptor Robust to Occlusion.
Proceedings of the ICPRAM 2014, 2014

An Efficient Shape Feature Extraction, Description and Matching Method Using GPU.
Proceedings of the Pattern Recognition Applications and Methods, 2014

Partial Shape Matching and Retrieval under Occlusion and Noise.
Proceedings of the Progress in Pattern Recognition, Image Analysis, Computer Vision, and Applications, 2014

2013
FPGA-based detection of SIFT interest keypoints.
Mach. Vis. Appl., 2013

2012
Integrated three-dimensional reconstruction using reflectance fields
CoRR, 2012

A Hardware Architecture for Image Clustering Using Spiking Neural Networks.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

Using a Scaling Factor in O(1/N) for the fixed-point implementation of the second-order goertzel filter.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Acceleration of the reflectance field acquisition using independent component analysis.
Proceedings of the 22nd International Conference on Electrical Communications and Computers, 2012

Embedded attitude control system for the educative satellite SATEDU.
Proceedings of the 22nd International Conference on Electrical Communications and Computers, 2012

2009
Input and/or output pruning of composite length FFTs using a DIF-DIT transform decomposition.
IEEE Trans. Signal Process., 2009

Parallel Processor for 3D Recovery from Optical Flow.
Int. J. Reconfigurable Comput., 2009

Hardware implementation of Spiking Neural Network classifiers based on backpropagation-based learning algorithms.
Proceedings of the International Joint Conference on Neural Networks, 2009

Hardware/Software FPGA Architecture for Robotics Applications.
Proceedings of the Reconfigurable Computing: Architectures, 2009

2008
Ranking Corner Points by the Angular Difference between Dominant Edges.
Proceedings of the Computer Vision Systems, 6th International Conference, 2008

Biologically-Inspired Digital Architecture for a Cortical Model of Orientation Selectivity.
Proceedings of the Artificial Neural Networks, 2008

A Low-Level Image Processing Algorithms Accelerator Platform.
Proceedings of the 18th International Conference on Electronics, 2008

Creation of a 3D Robot Model and its Integration to a Microsoft Robotics Studio Simulation.
Proceedings of the Advanced Techniques in Computing Sciences and Software Engineering, 2008

2007
Compact FPGA-based systolic array architecture suitable for vision systems.
Int. J. High Perform. Syst. Archit., 2007

High Performance Hardware Implementation of SpikeProp Learning: Potential and Tradeoffs.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

2006
Real Time FPGA-based Architecture for Video Applications.
Proceedings of the 2006 IEEE International Conference on Reconfigurable Computing and FPGA's, 2006

A Domain Reduction Algorithm for Incremental Projective Reconstruction.
Proceedings of the Advances in Visual Computing, Second International Symposium, 2006

Iterative Closest SIFT Formulation for Robust Feature Matching.
Proceedings of the Advances in Visual Computing, Second International Symposium, 2006

Customizable FPGA-based architecture for video applications in real time.
Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

Stereo Analysis Extension Based on BRDF Reciprocity.
Proceedings of the 16th International Conference on Electronics, Communications, and Computers (CONIELECOMP 2006), 27 February 2005, 2006

2005
FPGA-Based Configurable Systolic Architecture for Window-Based Image Processing.
EURASIP J. Adv. Signal Process., 2005

FPGA-based customizable systolic architecture for image processing applications.
Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, 2005

Real-time FPGA-based architecture for bicubic interpolation: an application for digital image scaling.
Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, 2005

3D Recovery with Free Hand Camera Motion.
Proceedings of the Sixth Mexican International Conference on Computer Science (ENC 2005), 2005

Super-resolution with integrated radial distortion correction.
Proceedings of the Sixth Mexican International Conference on Computer Science (ENC 2005), 2005

2004
Real-time image processing with a compact FPGA-based systolic architecture.
Real Time Imaging, 2004

2003
Three video applications using an FPGA based pyramid implementation: Tracking, Mosaics and Stabilization.
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003

FPGA Based High Density Spiking Neural Network Array.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Configurable Hardware Architecture for Real-Time Window-Based Image Processing.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

FPGA Processor for Real-Time Optical Flow Computation.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2002
A reconfigurable vision system for real-time applications.
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

An FPGA Co-processor for Real-Time Visual Tracking.
Proceedings of the Field-Programmable Logic and Applications, 2002

2001
Real-time field programmable gate array architecture for computer vision.
J. Electronic Imaging, 2001

Multiple Stereo Matching Using an Extended Architecture.
Proceedings of the Field-Programmable Logic and Applications, 2001

2000
Bragg Curve Identification Using a Neural Network.
Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks, 2000

Compact Spiking Neural Network Implementation in FPGA.
Proceedings of the Field-Programmable Logic and Applications, 2000

An FPGA Architecture for High Speed Edge and Corner Detection.
Proceedings of the Fifth International Workshop on Computer Architectures for Machine Perception (CAMP 2000), 2000

1999
FPGA Based Computer Vision Camera.
Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999

1996
A Focal Plane Architecture for Motion Computation.
Real Time Imaging, 1996


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