Miguel Lino Silva

According to our database, Miguel Lino Silva authored at least 7 papers between 2005 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2012

Run-time generation of partial FPGA configurations for subword operations.

Miguel Lino Silva, João Canas Ferreira

Microprocess. Microsystems, 2012

Run-time generation of partial FPGA configurations.

Miguel Lino Silva, João Canas Ferreira

J. Syst. Archit., 2012

2010

Creation of Partial FPGA Configurations at Run-Time.

Miguel Lino Silva, João Canas Ferreira

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2008

Generation of partial FPGA configurations at run-time.

Miguel Lino Silva, João Canas Ferreira

Proceedings of the FPL 2008, 2008

2007

Generation of hardware modules for run-time reconfigurable hybrid CPU/FPGA systems.

Miguel Lino Silva, João Canas Ferreira

IET Comput. Digit. Tech., 2007

2006

Support for partial run-time reconfiguration of platform FPGAs.

Miguel Lino Silva, João Canas Ferreira

J. Syst. Archit., 2006

2005

Using a Tightly-Coupled Pipeline in Dynamically Reconfigurable Platform FPGAs.

Miguel Lino Silva, João Canas Ferreira

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005