Mickaël Raulet
Orcid: 0000-0002-9704-1612
According to our database1,
Mickaël Raulet
authored at least 106 papers
between 2002 and 2024.
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On csauthors.net:
Bibliography
2024
Proceedings of the 3rd Mile-High Video Conference, 2024
Proceedings of the 3rd Mile-High Video Conference, 2024
Proceedings of the 3rd Mile-High Video Conference, 2024
2023
Proceedings of the 2nd Mile-High Video Conference, 2023
Proceedings of the 2nd Mile-High Video Conference, 2023
Proceedings of the First International Workshop on Green Multimedia Systems, 2023
2022
IEEE Consumer Electron. Mag., 2022
Proceedings of the MHV '22: Mile-High Video Conference, Denver, Colorado, USA, March 1, 2022
Delivering universal TV services in a multi-network and multi-device world with DVB-I.
Proceedings of the MHV '22: Mile-High Video Conference, Denver, Colorado, USA, March 1, 2022
Live OTT services delivery with Ad-insertion using VVC, CMAF-LL and ROUTE: an end-to-end chain.
Proceedings of the MHV '22: Mile-High Video Conference, Denver, Colorado, USA, March 1, 2022
2021
A Complete End to End Open Source Toolchain for the Versatile Video Coding (VVC) Standard.
Proceedings of the MM '21: ACM Multimedia Conference, Virtual Event, China, October 20, 2021
2020
Proceedings of the IEEE International Conference on Multimedia and Expo, 2020
2019
IEEE Access, 2019
Proceedings of the 2019 IEEE International Conference on Image Processing, 2019
Decoder-Side Intra Mode Derivation Based on a Histogram of Gradients in Versatile Video Coding.
Proceedings of the Data Compression Conference, 2019
2018
Efficient System-Level Hardware Synthesis of Dataflow Programs Using Shared Memory Based FIFO - HEVC Decoder Case Study.
J. Signal Process. Syst., 2018
Proceedings of the 2018 IEEE International Symposium on Broadband Multimedia Systems and Broadcasting, 2018
2017
On the Development and Optimization of HEVC Video Decoders Using High-Level Dataflow Modeling.
J. Signal Process. Syst., 2017
Proceedings of the 25th European Signal Processing Conference, 2017
2016
IEEE Trans. Circuits Syst. Video Technol., 2016
Proceedings of the 24th European Signal Processing Conference, 2016
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016
2015
J. Signal Process. Syst., 2015
Energy estimation models for video decoders: reconfigurable video coding-CAL case-study.
IET Comput. Digit. Tech., 2015
Proceedings of the 2015 IEEE International Conference on Acoustics, 2015
2014
Energy-aware decoder management: a case study on RVC-CAL specification based on just-in-time adaptive decoder engine.
IEEE Trans. Consumer Electron., 2014
Proceedings of the Multimedia Systems Conference 2014, 2014
Proceedings of the IEEE International Conference on Multimedia and Expo, 2014
Proceedings of the 2013 IEEE International Conference on Multimedia and Expo Workshops, 2014
Proceedings of the 2014 IEEE International Conference on Image Processing, 2014
Proceedings of the 2014 IEEE International Conference on Image Processing, 2014
Proceedings of the IEEE International Conference on Consumer Electronics, 2014
Proceedings of the IEEE International Conference on Consumer Electronics, 2014
Proceedings of the IEEE International Conference on Acoustics, 2014
Proceedings of the IEEE International Conference on Acoustics, 2014
Proceedings of the 22nd European Signal Processing Conference, 2014
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014
Development and optimization of high level dataflow programs: The HEVC decoder design case.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014
2013
Proceedings of the Handbook of Signal Processing Systems, 2013
Automatic Hierarchical Discovery of Quasi-Static Schedules of RVC-CAL Dataflow Programs.
J. Signal Process. Syst., 2013
IEEE Trans. Consumer Electron., 2013
Automated design of networks of transport-triggered architecture processors using dynamic dataflow programs.
Signal Process. Image Commun., 2013
MPEG Reconfigurable Video Coding: From specification to a reconfigurable implementation.
Signal Process. Image Commun., 2013
Optimized dynamic compilation of dataflow representations for multimedia applications.
Ann. des Télécommunications, 2013
Proceedings of the ACM Multimedia Conference, 2013
Towards run-time actor mapping of dynamic dataflow programs onto multi-core platforms.
Proceedings of the 8th International Symposium on Image and Signal Processing and Analysis, 2013
Proceedings of the IEEE International Conference on Acoustics, 2013
Proceedings of the 2013 Data Compression Conference, 2013
System-level PMC-driven energy estimation models in RVC-CAL video codec specifications.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
2012
Automatic Generation of Optimized and Synthesizable Hardware Implementation from High-Level Dataflow Programs.
VLSI Design, 2012
Int. J. Embed. Real Time Commun. Syst., 2012
Automatic generation of synthesizable hardware implementation from high level RVC-cal description.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012
An experimental toolchain based on high-level dataflow models of computation for heterogeneous MPSoC.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012
2011
J. Signal Process. Syst., 2011
Synthesizing Hardware from Dataflow Programs - An MPEG-4 Simple Profile Decoder Case Study.
J. Signal Process. Syst., 2011
J. Signal Process. Syst., 2011
J. Signal Process. Syst., 2011
IEEE Trans. Consumer Electron., 2011
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011
Proceedings of the 19th International Conference on Multimedia 2011, Scottsdale, AZ, USA, November 28, 2011
Proceedings of the IEEE International Conference on Acoustics, 2011
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011
2010
IEEE Signal Process. Mag., 2010
Advanced list scheduling heuristic for task scheduling with communication contention for parallel embedded systems.
Sci. China Inf. Sci., 2010
Proceedings of the Mobile Multimedia Communications - 6th International ICST Conference, 2010
Reconfigurable video coding: a stream programming approach to the specification of new video coding standards.
Proceedings of the First Annual ACM SIGMM Conference on Multimedia Systems, 2010
Proceedings of the 18th International Conference on Multimedia 2010, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
Automated generation of an efficient MPEG-4 Reconfigurable Video Coding decoder implementation.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
A portable Video Tool Library for MPEG Reconfigurable Video Coding using LLVM representation.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010
Proceedings of the Handbook of Signal Processing Systems, 2010
2009
IEEE Trans. Circuits Syst. Video Technol., 2009
HDS, a real-time multi-DSP motion estimator for MPEG-4 H.264 AVC high definition video encoding.
J. Real Time Image Process., 2009
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009
An Integrated Environment for HW/SW Co-design based on a CAL Specification and HW/SW Code Generators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the International Conference on Image Processing, 2009
2008
SIGARCH Comput. Archit. News, 2008
Automatic software synthesis of dataflow program: An MPEG-4 simple profile decoder case study.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008
Validation of bitstream syntax and synthesis of parsers in the MPEG Reconfigurable Video Coding framework.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008
Code generation for the MPEG Reconfigurable Video Coding framework: From CAL actions to C functions.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008
Proceedings of the International Conference on Image Processing, 2008
2007
Proceedings of the 15th European Signal Processing Conference, 2007
Framework for efficient cosimulation and fast prototyping on multi-components with AAA methodology: LAR codec study case.
Proceedings of the 15th European Signal Processing Conference, 2007
2006
Rapid Prototyping for Heterogeneous Multicomponent Systems: An MPEG-4 Stream over a UMTS Communication Link.
EURASIP J. Adv. Signal Process., 2006
Automatic dsp cache memory management and fast prototyping for multiprocessor image applications.
Proceedings of the 14th European Signal Processing Conference, 2006
Proceedings of the 14th European Signal Processing Conference, 2006
2005
SynDEx executive kernels for fast developments of applications over heterogeneous architectures.
Proceedings of the 13th European Signal Processing Conference, 2005
2004
Fast Prototyping Methodology for Distributed and Heterogeneous Architectures: Application to Mpeg-4 Video Tools.
Des. Autom. Embed. Syst., 2004
2003
Rapid prototyping for an optimized MPEG4 decoder implementation over a parallel heterogeneous architecture.
Proceedings of the 2003 IEEE International Conference on Multimedia and Expo, 2003
Rapid prototyping for an optimized MPEG-4 decoder implementation over a parallel heterogenous architecture.
Proceedings of the 2003 IEEE International Conference on Acoustics, 2003
2002
Rapid prototyping methodology for multi-DSP TI C6X platforms applied to an Mpeg-2 coding application.
Proceedings of the Fourteenth Annual ACM Symposium on Parallel Algorithms and Architectures, 2002
A VsynDEx Methodology for Fast Prototyping of Multi-C6x DSP Architectures.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002
Syndex executive kernel development for DSPs TI C6X applied to real-time and embedded multiprocessors architectures.
Proceedings of the 11th European Signal Processing Conference, 2002