Michio Komoda

According to our database1, Michio Komoda authored at least 4 papers between 1998 and 2012.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2012
A Yield and Reliability Improvement Methodology Based on Logic Redundant Repair with a Repairable Scan Flip-Flop Designed by Push Rule.
ACM Trans. Design Autom. Electr. Syst., 2012

2008
Clock-Skew Test Module for Exploring Reliable Clock-Distribution Under Process and Global Voltage-Temperature Variations.
IEEE Trans. Very Large Scale Integr. Syst., 2008

2006
A Time-Slicing Ring Oscillator for Capturing Instantaneous Delay Degradation and Power Supply Voltage Drop.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

1998
Ground Bounce Considerations in DC Parametric Test Generation Using Boundary Scan.
Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998


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