Michihiro Inoue

According to our database, Michihiro Inoue authored at least 4 papers between 1988 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2016

Packaging in minimal fab: An integrated semiconductor line from wafer process to packaging process.

Michihiro Inoue, Fumito Imura, Arami Saruwatari, Shiro Hara

Proceedings of the International Conference on IC Design and Technology, 2016

2005

Effect of Mobility on Communication Performance in Overloaded One-Dimensional Cellular Networks.

Michihiro Inoue, Noriaki Yoshiura, Yoshikuni Onozato

Proceedings of the Distributed Computing and Internet Technology, 2005

1993

A New Testing Acceleration Chip for Low-Cost Memory Tests.

Michihiro Inoue, Toshio Yamada, Atsushi Fujiwara

IEEE Des. Test Comput., 1993

1988

A 4-Mbit DRAM with 16-bit concurrent ECC.

Toshio Yamada, Hisakazu Kotani, Junko Matsushima, Michihiro Inoue

IEEE J. Solid State Circuits, February, 1988