Michel J. Declercq

According to our database, Michel J. Declercq authored at least 42 papers between 1989 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

A 0.24-nJ/bit Super-Regenerative Pulsed UWB Receiver in 0.18- μ m CMOS.

Prakash E. Thoppay, Catherine Dehollain, Michael M. Green, Michel J. Declercq

IEEE J. Solid State Circuits, 2011

2010

Wireless Voltage Regulation for Passive Transponders Using an IF to Communicate.

Nicolas Pillin, Norbert Joehl, Catherine Dehollain, Michel J. Declercq

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

2009

Load Optimization of an Inductive Power Link for Remote Powering of Biomedical Implants.

Kanber Mithat Silay, Denis Dondi, Luca Larcher, Michel J. Declercq, Luca Benini, Yusuf Leblebici, Catherine Dehollain

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Compact Modeling of Suspended Gate FET.

Yogesh Singh Chauhan, Dimitrios Tsamados, Nicolas Abelé, Christoph Eggimann, Michel J. Declercq, Adrian M. Ionescu

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

A 7.5mA 500 MHz UWB receiver based on super-regenerative principle.

Prakash E. Thoppay, Catherine Dehollain, Michel J. Declercq

Proceedings of the ESSCIRC 2008, 2008

2007

A New Charge based Compact Model for Lateral Asymmetric MOSFET and its application to High Voltage MOSFET Modeling.

Yogesh Singh Chauhan, François Krummenacher, Renaud Gillon, Benoit Bakeroot, Michel J. Declercq, Adrian M. Ionescu

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

2006

A GSM-GPRS/UMTS FDD-TDD/WLAN 802.11a-b-g multi-standard carrier generation system.

Adil Koukab, Yu Lei, Michel J. Declercq

IEEE J. Solid State Circuits, 2006

Capacitorless 1T DRAM sensing scheme with automatic reference generation.

Marija Blagojevic, Maher Kayal, Marc Pastre, Louis Harik, Michel J. Declercq, Serguei Okhonin, Pierre C. Fazan

IEEE J. Solid State Circuits, 2006

A Compact DC and AC Model for Circuit Simulation of High Voltage VDMOS Transistor.

Yogesh Singh Chauhan, Costin Anghel, François Krummenacher, Renaud Gillon, Andre Baguenier, Bart Desoete, Steven Frere, Adrian Mihai Ionescu, Michel J. Declercq

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

2005

A model for μ-power rectifier analysis and design.

Jari-Pascal Curty, Norbert Joehl, François Krummenacher, Catherine Dehollain, Michel J. Declercq

IEEE Trans. Circuits Syst. I Regul. Pap., 2005

Remotely powered addressable UHF RFID integrated system.

Jari-Pascal Curty, Norbert Joehl, Catherine Dehollain, Michel J. Declercq

IEEE J. Solid State Circuits, 2005

Multistandard carrier generation system for quad-band GSM/WCDMA (FDD-TDD)/WLAN (802.11 a-b-g) radio.

Adil Koukab, Yu Lei, Michel J. Declercq

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004

Modeling techniques and verification methodologies for substrate coupling effects in mixed-signal system-on-chip designs.

Adil Koukab, Kaustav Banerjee, Michel J. Declercq

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

A fast Modulator for dynamic supply linear RF power amplifier.

Nicolas Schlumpf, Michel J. Declercq, Catherine Dehollain

IEEE J. Solid State Circuits, 2004

2003

Frequency-interleaving technique for high-speed A/D conversion.

Guillaume Ding, Catherine Dehollain, Michel J. Declercq, Kamran Azadet

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002

Modeling and Design of a Low-Voltage SOI Suspended-Gate MOSFET (SG-MOSFET) with a Metal-over-Gate Architecture.

Adrian M. Ionescu, V. Pott, R. Fritschi, Kaustav Banerjee, Michel J. Declercq, Philippe Renaud, C. Hibert, Philippe Flückiger, G. A. Racine

Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

A SET quantizer circuit aiming at digital communication system.

Santanu Mahapatra, Adrian M. Ionescu, Kaustav Banerjee, Michel J. Declercq

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Analysis and optimization of substrate noise coupling in single-chip RF transceiver design.

Adil Koukab, Kaustav Banerjee, Michel J. Declercq

Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

HSpeedEx: a high-speed extractor for substrate noise analysis in complex mixed signal SOC.

Adil Koukab, Catherine Dehollain, Michel J. Declercq

Proceedings of the 39th Design Automation Conference, 2002

Few electron devices: towards hybrid CMOS-SET integrated circuits.

Adrian M. Ionescu, Michel J. Declercq, Santanu Mahapatra, Kaustav Banerjee, Jacques Gautier

Proceedings of the 39th Design Automation Conference, 2002

SOI Hall effect sensor operating up to 270°C.

Lionel Portmann, Hussein Ballan, Michel J. Declercq

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001

A low-power CMOS super-regenerative receiver at 1 GHz.

Alexandre Vouilloz, Michel J. Declercq, Catherine Dehollain

IEEE J. Solid State Circuits, 2001

A low-power 1-GHz super-regenerative transceiver with time-shared PLL control.

Norbert Joehl, Catherine Dehollain, Patrick Favre, Philippe Deval, Michel J. Declercq

IEEE J. Solid State Circuits, 2001

2000

A CMOS readout circuit for pico-ampere thin film pyroelectric array detectors.

Tristan Reimann, François Krummenacher, B. Willing, P. Muralt, Michel J. Declercq

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999

PCFL3: a low-power, high-speed, single-ended logic family.

Riad Kanan, Michel J. Declercq

IEEE J. Solid State Circuits, 1999

A 640 mW high accuracy 8-bit 1 GHz flash ADC encoder.

Riad Kanan, François Kaess, Michel J. Declercq

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Performance/power tradeoffs in high-speed GaAs ADCs.

François Kaess, Riad Kanan, Bertrand Hochet, Michel J. Declercq

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Modelisation and simulation of integrated super-regenerative receivers.

Alexandre Vouilloz, Catherine Dehollain, Michel J. Declercq

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1998

A 2-V 600-μA 1-GHz BiCMOS super-regenerative receiver for ISM applications.

Patrick Favre, Norbert Joehl, Alexandre Vouilloz, Philippe Deval, Catherine Dehollain, Michel J. Declercq

IEEE J. Solid State Circuits, 1998

A high-efficiency CMOS voltage doubler.

Pierre Favrat, Philippe Deval, Michel J. Declercq

IEEE J. Solid State Circuits, 1998

An overview of the current steering logic (CSL): from the gate to the applications.

R. T. Lara Sáez, Maher Kayal, Michel J. Declercq, M. C. Schneider

Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

A high-speed BiCMOS switched-current track-and-hold circuit.

Tristan Reimann, François Krummenacher, Michel J. Declercq

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

An automatic offset compensation technique applicable to existing operational amplifier core cell.

Maher Kayal, R. T. Lara Sáez, Michel J. Declercq

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

1997

A BiCMOS programmable continuous-time filter using image-parameter method synthesis and voltage-companding technique.

Gilles van Ruymbeke, Christian C. Enz, François Krummenacher, Michel J. Declercq

IEEE J. Solid State Circuits, 1997

EUROPRACTICE and FUSE: the European Commission programmes for supporting education and technology transfer in microelectronics.

Anne De Baas, Michel J. Declercq

Proceedings of the 1997 IEEE International Conference on Microelectronic Systems Education, 1997

1996

An 8-b, 40 msamples/s switched-current-mode track-and-hold circuit on a BiCMOS sea-of-gates array.

Tristan Reimann, François Krummenacher, Michel J. Declercq

IEEE J. Solid State Circuits, 1996

Pseudo-complementary FET logic (PCFL): a low-power logic family in GaAs.

Riad Kanan, Bertrand Hochet, Michel J. Declercq

IEEE J. Solid State Circuits, 1996

Digital circuit techniques for mixed analog/digital circuits applications.

R. T. Lara Sáez, Maher Kayal, Michel J. Declercq, M. C. Schneider

Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

1992

A prototype tool for the design-oriented symbolic analysis of analogue circuits.

F. Dorel, Michel J. Declercq

Int. J. Circuit Theory Appl., 1992

A fast, single-layer, area router for semi-custom analogue circuits.

Oscar Buset, Michel J. Declercq, Fouad Rahali, Pascal Vaucher

Int. J. Circuit Theory Appl., 1992

1991

An integrated layout system for sea-of-gates module generation.

Philippe Duchene, Michel J. Declercq, S. M. Kang

Proceedings of the conference on European design automation, 1991

1989

A highly flexible sea-of-gates structure for digital and analog applications.

Philippe Duchene, Michel J. Declercq

IEEE J. Solid State Circuits, June, 1989