Michel Auguin
According to our database1,
Michel Auguin
authored at least 97 papers
between 1982 and 2019.
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Bibliography
2019
Int. J. Semantic Comput., 2019
QoS and Energy-Aware Run-Time Adaptation for Mobile Robotic Missions: A Learning Approach.
Proceedings of the 3rd IEEE International Conference on Robotic Computing, 2019
2018
Mobile Terminals System-Level Memory Exploratio for Power and Performance Optimization.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018
Proceedings of the Second IEEE International Conference on Robotic Computing, 2018
2017
Proceedings of the 12th IEEE International Symposium on Industrial Embedded Systems, 2017
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017
2016
Proceedings of the 27th IEEE International Conference on Application-specific Systems, 2016
2015
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015
A methodology for inserting clock-management strategies in transaction-level models of systemon- chips.
Proceedings of the 2015 Forum on Specification and Design Languages, 2015
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015
2014
IEEE Trans. Ind. Informatics, 2014
Proceedings of the Testing Software and Systems, 2014
2013
Int. J. Sens. Networks, 2013
Power domain management interface: flexible protocol interface for transaction-level power domain management.
IET Comput. Digit. Tech., 2013
Power-Aware Wrappers for Transaction-Level Virtual Prototypes: A Black Box Based Approach.
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013
Temperature-aware DVFS-DPM for real-time applications under variable ambient temperature.
Proceedings of the 8th IEEE International Symposium on Industrial Embedded Systems, 2013
Proceedings of the ARCS 2013, 2013
2012
Using unified power format standard concepts for power-aware design and verification of systems-onchip at transaction level.
IET Circuits Devices Syst., 2012
A framework for modeling and simulating energy harvesting WSN nodes with efficient power management policies.
EURASIP J. Embed. Syst., 2012
Using model driven engineering to reliably accelerate early Low Power Intent Exploration for a system-on-chip design.
Proceedings of the ACM Symposium on Applied Computing, 2012
A semi-partitioned real-time scheduling approach for periodic task systems on multicore platforms.
Proceedings of the ACM Symposium on Applied Computing, 2012
An Open-Loop Energy Neutral Power Manager for Solar Harvesting WSN.
Proceedings of the PECCS 2012, 2012
A high level mixed hardware/software modeling framework for rapid performance estimation.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012
Black-box and white-box early power intent simulation and verification: Two novel approaches.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012
2011
Hybrid power management in real time embedded systems: an interplay of DVFS and DPM techniques.
Real Time Syst., 2011
J. Softw., 2011
A performance estimation flow for embedded systems with mixed software/hardware modeling.
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011
A Methodology for Power-Aware Transaction-Level Models of Systems-on-Chip Using UPF Standard Concepts.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011
Proceedings of the ARCS 2011, 2011
2010
Implantation d'un décodeur H.264 sur plateforme multiprocesseur avec gestion énergétique.
Tech. Sci. Informatiques, 2010
J. Networks, 2010
Proceedings of the 2010 7th International Symposium on Wireless Communication Systems, 2010
Power Management in Real Time Embedded Systems through Online and Adaptive Interplay of DPM and DVFS Policies.
Proceedings of the IEEE/IFIP 8th International Conference on Embedded and Ubiquitous Computing, 2010
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010
2009
J. Object Technol., 2009
J. Object Technol., 2009
Assertive Dynamic Power Management (AsDPM) Strategy for Globally Scheduled RT Multiprocessor Systems.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009
Analytical Model for Energy Consumption Analysis in Grid Based Wireless Sensor Networks.
Proceedings of the NTMS 2009, 2009
A framework for offline optimization of energy consumption in real time multiprocessor system-on-chip.
Proceedings of the 16th IEEE International Conference on Electronics, 2009
2008
J. Low Power Electron., 2008
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008
Proceedings of the 37th International Conference on Parallel Processing, 2008
Embedded Multicore Implementation of a H.264 Decoder with Power Management Considerations.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008
2007
Tech. Sci. Informatiques, 2007
Trans. High Perform. Embed. Archit. Compil., 2007
2006
Microprocess. Microsystems, 2006
Proceedings of the IFIP VLSI-SoC 2006, 2006
Proceedings of the International Symposium on Industrial Embedded Systems, 2006
Proceedings of the International Symposium on Industrial Embedded Systems, 2006
Proceedings of the Embedded Computer Systems: Architectures, 2006
Contentions-conscious dynamic but deterministic scheduling of computational and communication tasks.
Proceedings of the 2006 ACM Symposium on Applied Computing (SAC), 2006
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Multi-Bank Main Memory Architecture with Dynamic Voltage Frequency Scaling for System Energy Optimization.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
Proceedings of the ARCS 2006, 2006
2005
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005
2004
Proceedings of the Integrated Circuit and System Design, 2004
2003
Partitionnement logiciel matériel ciblant une architecture reconfigurable dynamiquement.
Tech. Sci. Informatiques, 2003
Partitioning Reactive Data Flow Applications On Dynamically Reconfigurable Systems.
Proceedings of the IFIP VLSI-SoC 2003, 2003
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003
2002
Partitionnement de spécifications flots de données conditionnels pour la conception de systèmes embarqués.
Tech. Sci. Informatiques, 2002
Proceedings of the 11th European Signal Processing Conference, 2002
Proceedings of the International Conference on Compilers, 2002
2001
Power Consumption Model for the DSP OAK Processor.
Proceedings of the SOC Design Methodologies, 2001
Proceedings of the IEEE International Conference on Acoustics, 2001
2000
ACM Trans. Design Autom. Electr. Syst., 2000
Proceedings of the 12th IEEE International Conference on Application-Specific Systems, 2000
1999
A Prototyping Method of Embedded Real Time Systems for Signal Processing Applications.
Proceedings of the 25th EUROMICRO '99 Conference, 1999
Rapid Development of Optimized DSP Code from a High Level Description Through Software Estimations.
Proceedings of the 36th Conference on Design Automation, 1999
1998
Improving "performance vs silicon size" tradeoffs using coprocessors: A case study: G.721 on OAK and Pine DSP Cores.
Proceedings of the 9th European Signal Processing Conference, 1998
Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998
Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998
1997
ACM Trans. Design Autom. Electr. Syst., 1997
Proceedings of the Fifth International Workshop on Hardware/Software Codesign, 1997
1996
Proceedings of the 9th International Symposium on System Synthesis, 1996
1994
Automatic exploration of VLIW processor architectures from a designer's experience based specification.
Proceedings of the Third International Workshop on Hardware/Software Codesign, 1994
Proceedings of the Third International Workshop on Hardware/Software Codesign, 1994
1993
Contribution of Compilation Techniques to the Synthesis of Dedicated VLIW Architectures.
Proceedings of the IFIP WG10.3. Working Conference on Architectures and Compilation Techniques for Fine and Medium Grain Parallelism, 1993
Proceedings of the IEEE International Conference on Acoustics, 1993
Proceedings of the International Conference on Application-Specific Array Processors, 1993
1992
A comparison study of minimization methods of unit interconnection in VLIW processors.
Microprocess. Microprogramming, 1992
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992
Automatic generation of architectural models for designing dedicated VLIW signal processors.
Proceedings of the 1992 IEEE International Conference on Acoustics, 1992
1990
Microprocessing and Microprogramming, 1990
Proceedings of IAPR Workshop on Machine Vision Applications, 1990
1988
Proceedings of the 9th International Conference on Pattern Recognition, 1988
1987
Microprocess. Microprogramming, 1987
1982
Proceedings of the IEEE International Conference on Acoustics, 1982