Michail Moraitis
Orcid: 0000-0002-0278-5986
According to our database1,
Michail Moraitis
authored at least 16 papers
between 2020 and 2024.
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2024
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Bibliography
2024
IEEE Des. Test, October, 2024
2023
J. Hardw. Syst. Secur., March, 2023
A side-channel resistant implementation of AES combining clock randomization with duplication.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Attacking and Securing the Clock Randomization and Duplication Side-Channel Attack Countermeasure.
Proceedings of the Foundations and Practice of Security - 16th International Symposium, 2023
2022
IACR Cryptol. ePrint Arch., 2022
Side-Channel Attack Countermeasures Based On Clock Randomization Have a Fundamental Flaw.
IACR Cryptol. ePrint Arch., 2022
Do Not Rely on Clock Randomization: A Side-Channel Attack on a Protected Hardware Implementation of AES.
Proceedings of the Foundations and Practice of Security - 15th International Symposium, 2022
2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
2020
Profiled Deep Learning Side-Channel Attack on a Protected Arbiter PUF Combined with Bitstream Modification.
IACR Cryptol. ePrint Arch., 2020
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020
Proceedings of the HASP@MICRO 2020: Hardware and Architectural Support for Security and Privacy, 2020
Proceedings of the 38th IEEE International Conference on Computer Design, 2020