Michael Zelikson
According to our database1,
Michael Zelikson
authored at least 11 papers
between 2000 and 2023.
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Bibliography
2023
A Digital Low-Dropout (LDO) Linear Regulator with Adaptive Transfer Function Featuring 125A/mm<sup>2</sup> Power Density and Autonomous Bypass Mode.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A Monolithic 26A/mm<sup>2</sup>Imax, 88.5% Peak-Efficiency Continuously Scalable Conversion-Ratio Switched-Capacitor DC-DC Converter.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2016
Dual-Mode Low-Drop-Out Regulator/Power Gate With Linear and On-Off Conduction for Microprocessor Core On-Die Supply Voltages in 14 nm.
IEEE J. Solid State Circuits, 2016
4.1 14nm 6th-generation Core processor SoC with low power consumption and improved performance.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
8.7 Dual-use low-drop-out regulator/power gate with linear and on-off conduction modes for microprocessor on-die supply voltages in 14nm.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2012
A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor.
IEEE J. Solid State Circuits, 2012
2010
Proceedings of the 17th IEEE International Conference on Electronics, 2010
2004
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004
2003
On-chip interconnect-aware design and modeling methodology, based on high bandwidth transmission line devices.
Proceedings of the 40th Design Automation Conference, 2003
2002
An Interconnect-Aware Methodology for Analog and Mixed Signal Design, Based on High Bandwidth (Over 40 Ghz) On-Chip Transmission Line Approach .
Proceedings of the 2002 Design, 2002
2000
Novel design technique for highly linear current mode amplifiers. Analysis, design, simulations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000