Michael Ullmann

According to our database1, Michael Ullmann authored at least 14 papers between 1999 and 2010.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2010
Adaptive Runtime System with Intelligent Allocation of Dynamically Reconfigurable Function Model and Optimized Interface Topologies.
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010

2006
Communication concept for adaptive intelligent run-time systems supporting distributed reconfigurable embedded systems.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2005
Rekonfigurierbare Hardware und intelligente Laufzeitsysteme für adaptives Rechnen.
it Inf. Technol., 2005

On-demand FPGA run-time system for flexible and dynamical reconfiguration.
Int. J. Embed. Syst., 2005

Realtime configuration code decompression for dynamic FPGA self reconfiguration: evaluation and implementation.
Int. J. Embed. Syst., 2005

Hardware Enhanced Function Allocation Management in Reconfigurable Systems.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

2004
An FPGA Run-Time System for Dynamical On-Demand Reconfiguration.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

On-Demand FPGA Run-Time System for Dynamical Reconfiguration with Adaptive Priorities.
Proceedings of the Field Programmable Logic and Application, 2004

Scalable Application-Dependent Network on Chip Adaptivity for Dynamical Reconfigurable Real-Time Systems.
Proceedings of the Field Programmable Logic and Application, 2004

Hardware Support for QoS-based Function Allocation in Reconfigurable Systems.
Proceedings of the 2004 Design, 2004

2003
Run-Time FPGA Reconfiguration for Power-/Cost-Optimized Real-time Systems.
Proceedings of the VLSI-SOC: From Systems to Chips, 2003

Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations.
Proceedings of the IFIP VLSI-SoC 2003, 2003

Power Estimation and Power Measurement of Xilinx Virtex FPGAs: Trade-Offs and Limitations.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

1999
Accelerated training of support vector machines.
Proceedings of the International Joint Conference Neural Networks, 1999


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