Michael S. Floyd
According to our database1,
Michael S. Floyd
authored at least 28 papers
between 2002 and 2021.
Collaborative distances:
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Bibliography
2021
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
2018
The 24-Core POWER9 Processor With Adaptive Clocking, 25-Gb/s Accelerator Links, and 16-Gb/s PCIe Gen4.
IEEE J. Solid State Circuits, 2018
IBM J. Res. Dev., 2018
Droop mitigation using critical-path sensors and an on-chip distributed power supply estimation engine in the z14™ enterprise processor.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2017
3.1 POWER9™: A processor family optimized for cognitive computing with 25Gb/s accelerator links and 16Gb/s PCIe Gen4.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2015
Proceedings of the 48th International Symposium on Microarchitecture, 2015
2013
IEEE Micro, 2013
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
2012
Proceedings of the Symposium on VLSI Circuits, 2012
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012
2011
IEEE Micro, 2011
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
2010
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010
Proceedings of the 2010 IEEE Hot Chips 22 Symposium, Stanford, CA, USA, August 22-24, 2010, 2010
2008
2007
IBM J. Res. Dev., 2007
A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2004
Proceedings of the 41th Design Automation Conference, 2004
2002
Fault-tolerant design of the IBM pSeries 690 system using POWER4 processor technology.
IBM J. Res. Dev., 2002