Michael Riera
According to our database1,
Michael Riera
authored at least 7 papers
between 2013 and 2024.
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Collaborative distances:
Timeline
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2024
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Bibliography
2024
FSpGEMM: A Framework for Accelerating Sparse General Matrix-Matrix Multiplication Using Gustavson's Algorithm on FPGAs.
IEEE Trans. Very Large Scale Integr. Syst., April, 2024
2021
FSpGEMM: An OpenCL-based HPC Framework for Accelerating General Sparse Matrix-Matrix Multiplication on FPGAs.
CoRR, 2021
FLASH 1.0: A Software Framework for Rapid Parallel Deployment and Enhancing Host Code Portability in Heterogeneous Computing.
CoRR, 2021
FSCHOL: An OpenCL-based HPC Framework for Accelerating Sparse Cholesky Factorization on FPGAs.
Proceedings of the 33rd IEEE International Symposium on Computer Architecture and High Performance Computing, 2021
2020
HALO 1.0: A Hardware-agnostic Accelerator Orchestration Framework for Enabling Hardware-agnostic Programming with True Performance Portability for Heterogeneous HPC.
CoRR, 2020
2013
Improving memory performance in reconfigurable computing architecture through hardware-assisted dynamic graph.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013
Boosting Memory Performance of Many-Core FPGA Device through Dynamic Precedence Graph.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013