Michael Raitza

Orcid: 0000-0003-2370-4054

According to our database1, Michael Raitza authored at least 18 papers between 2012 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2023
Formal Analysis of Camouflaged Reconfigurable Circuits.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

Tutorial: How to Use Model Checking to Analyze Circuits at the Transistor Level.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2023

2022
Exploring Standard-Cell Designs for Reconfigurable Nanotechnologies: A Formal Approach.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator.
Proceedings of the VLSI-SoC: Technology Advancement on SoC Design, 2021

Metastability with Emerging Reconfigurable Transistors: Exploiting Ambipolarity for Throughput.
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

AMAH-Flex: A Modular and Highly Flexible Tool for Generating Relocatable Systems on FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2021

2020
Quantitative Characterization of Reconfigurable Transistor Logic Gates.
IEEE Access, 2020

DiSCERN: Distilling Standard-Cells for Emerging Reconfigurable Nanotechnologies.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors.
IEEE Trans. Very Large Scale Integr. Syst., 2019

2018
A Hardware/Software Stack for Heterogeneous Systems.
IEEE Trans. Multi Scale Comput. Syst., 2018

A physical synthesis flow for early technology evaluation of silicon nanowire based reconfigurable FETs.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Technology mapping flow for emerging reconfigurable silicon nanowire transistors.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Exploiting transistor-level reconfiguration to optimize combinational circuits.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
RAW 2014: Random Number Generators on FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2016

Reconfigurable nanowire transistors with multiple independent gates for efficient and programmable combinational circuits.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2014
Influence of Magnetic Fields and X-Radiation on Ring Oscillators in FPGAs.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

2012
Influence of operating conditions on ring oscillator-based entropy sources in FPGAs.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Towards GCC-based automatic soft-core customization.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012


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