Michael Putrino

According to our database1, Michael Putrino authored at least 6 papers between 1988 and 1999.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

1999
A Low-Power, High-Speed Implementation of a PowerPC(tm) Microprocessor Vector Extension.
Proceedings of the 14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 1999

1998
Comparison of Single- and Dual-Pass Multiply-Add Fused Floating-Point Units.
IEEE Trans. Computers, 1998

1997
A G3 PowerPC™ superscalar low-power microprocessor.
Proceedings of the Proceedings IEEE COMPCON 97, 1997

1995
A New PowerPC Microprocessor for Low Power Computing Systems.
Proceedings of the COMPCON '95: Technologies for the Information Superhighway, 1995

1989
S/370 sign-magnitude floating-point adder.
IEEE J. Solid State Circuits, August, 1989

1988
Parallel Encryted Array Multipliers.
IBM J. Res. Dev., 1988


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