Michael Meixner

Orcid: 0000-0002-8183-0764

According to our database1, Michael Meixner authored at least 7 papers between 1998 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2017
Accurate Estimation of CMOS Power Consumption Considering Glitches by Using Waveform Lookup.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

2016
A Family of Modular QRD-Accelerator Architectures and Circuits Cross-Layer Optimized for High Area- and Energy-Efficiency.
J. Signal Process. Syst., 2016

2014
Statistical Modeling of Glitching Effects in Estimation of Dynamic Power Consumption.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014

Limits of gate-level power estimation considering real delay effects and glitches.
Proceedings of the 2014 International Symposium on System-on-Chip, 2014

2012
An approach for quantitative optimization of highly efficient dedicated CORDIC macros as SoC building blocks.
Proceedings of the IEEE 25th International SOC Conference, 2012

1998
Channel model for satellite indoor communication, system design.
Int. J. Satell. Commun. Netw., 1998

Realtime shadow feedback for interactive radiosity scenes using shaded multipoints.
Proceedings of the ACM Symposium on Virtual Reality Software and Technology, 1998


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