Michael Gschwind
Affiliations:- IBM Research
According to our database1,
Michael Gschwind
authored at least 55 papers
between 1994 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2008, "For contributions to high-performance computer architecture and compilation technology".
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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Bibliography
2024
PyTorch 2: Faster Machine Learning Through Dynamic Python Bytecode Transformation and Graph Compilation.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024
2022
Proceedings of the Fifth Conference on Machine Learning and Systems, 2022
ScaDL 2022 Invited Talk 4: Sustainable AI @ Scale: Accelerating AI models for billions of users.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022
2021
2018
IBM J. Res. Dev., 2018
2017
IBM J. Res. Dev., 2017
2016
IBM J. Res. Dev., 2016
2015
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015
Proceedings of the 2015 IEEE Hot Chips 27 Symposium (HCS), 2015
2014
Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014
2012
Proceedings of the International Conference on Supercomputing, 2012
2011
SoftBeam: Precise tracking of transient faults and vulnerability analysis at processor design time.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011
2010
2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
Proceedings of the 4th International Conference on Virtual Execution Environments, 2008
Next-Generation Performance Counters: Towards Monitoring Over Thousand Concurrent Events.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2008
Optimizing data sharing and address translation for the Cell BE Heterogeneous Chip Multiprocessor.
Proceedings of the 26th International Conference on Computer Design, 2008
2007
The Cell Broadband Engine: Exploiting Multiple Levels of Parallelism in a Chip Multiprocessor.
Int. J. Parallel Program., 2007
2006
Using advanced compiler technology to exploit the performance of the Cell Broadband Engine<sup>TM</sup> architecture.
IBM Syst. J., 2006
Proceedings of the Third Conference on Computing Frontiers, 2006
2005
Proceedings of the Second Conference on Computing Frontiers, 2005
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 2005
2004
IEEE Trans. Computers, 2004
2003
New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors.
IBM J. Res. Dev., 2003
2002
Proceedings of the Power-Aware Computer Systems, Second International Workshop, 2002
Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002
Proceedings of the Compiler Construction, 11th International Conference, 2002
2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
SIGARCH Comput. Archit. News, 2001
Proc. IEEE, 2001
2000
Proceedings of the 14th international conference on Supercomputing, 2000
1999
Proceedings of the 32nd Annual IEEE/ACM International Symposium on Microarchitecture, 1999
Proceedings of the Euro-Par '99 Parallel Processing, 5th International Euro-Par Conference, Toulouse, France, August 31, 1999
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999
1998
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998
Proceedings of the 1998 Design, 1998
1996
Proceedings of the Field-Programmable Logic, 1996
Proceedings of the conference on European design automation, 1996
1995
Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995
1994
Proceedings of the 25th SIGCSE Technical Symposium on Computer Science Education, 1994
Proceedings of the Field-Programmable Logic, 1994
Proceedings of the Field-Programmable Logic, 1994