Michael G. Wahl

Affiliations:
  • University of Siegen, Microsystems Engineering Group, Germany


According to our database1, Michael G. Wahl authored at least 17 papers between 1989 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2024
FAST GDRNPP: Improving the Speed of State-of-the-Art 6D Object Pose Estimation.
CoRR, 2024

2021
Branch selection and data optimization for selecting machines for processes in semiconductor manufacturing using AI-based predictions.
Proceedings of the IEEE International Conference on Electro Information Technology, 2021

2020
Yield prediction in semiconductor manufacturing using an AI-based cascading classification system.
Proceedings of the 2020 IEEE International Conference on Electro Information Technology, 2020

2019
AAT Meets Virtual Reality.
Proceedings of the Computer Vision, Imaging and Computer Graphics Theory and Applications, 2019

2015
Cost modeling and analysis for the design, manufacturing and test of 3D-ICs.
Proceedings of the 2015 International 3D Systems Integration Conference, 2015

2014
Site dependencies in a multisite testing environment.
Proceedings of the 19th IEEE European Test Symposium, 2014

Startup error detection and containment to improve the robustness of hybrid FlexRay networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Manufacturing and test assistance for 3D-Integrated heterogeneous systems.
Proceedings of the 2014 International 3D Systems Integration Conference, 2014

2007
A sophisticated memory test engine for LCD display drivers.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2003
The P1500 DFT Disclosure Document: A Standard to Communicate Mergeable Core DFT Data.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

2001
From DFT to systems test - a model based cost optimization tool.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001

1998
A VHDL SGRAM Model for the Validation Environment of a High Performance Graphic Processor.
Proceedings of the 1998 Design, 1998

A Systematic Analysis of Reuse Strategies for Design of Electronic Circuits.
Proceedings of the 1998 Design, 1998

1997
Introducing multimedia in teaching of digital system design.
Proceedings of the 1997 IEEE International Conference on Microelectronic Systems Education, 1997

1992
EDIF Test - The Upcoming Standard for Test Data Transfers.
Proceedings of the Proceedings IEEE International Test Conference 1992, 1992

1990
Development of a new standard for test.
Proceedings of the Proceedings IEEE International Test Conference 1990, 1990

1989
Data exchange formats for testing.
Microprocessing and Microprogramming, 1989


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