Michael Fulde

According to our database1, Michael Fulde authored at least 17 papers between 2005 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Fully-digital transmitter architectures and circuits for the next generation of wireless communications.
Elektrotech. Informationstechnik, 2018

2017
A Nonlinear Switched State-Space Model for Capacitive RF DACs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

13.2 A digital multimode polar transmitter supporting 40MHz LTE Carrier Aggregation in 28nm CMOS.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2011
LC-VCO in the 3.3- to 4-GHz Band Implemented in 32-nm Low-Power CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

A digitally controlled DC-DC converter for SoC in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

Reducing impact of degradation on analog circuits by chopper stabilization and autozeroing.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

An aging suppression and calibration approach for differential amplifiers in advanced CMOS technologies.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

An analog perspective on device reliability in 32nm high-κ metal gate technology.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

2010
Reliability assessment of voltage controlled oscillators in 32nm high-κ metal gate technology.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

2009
Design of Low-Voltage Bandgap Reference Circuits in Multi-Gate CMOS Technologies.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

FinFET RF receiver building blocks operating above 10 GHz.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

Assessment of the impact of technology scaling on the performance of LC-VCOs.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

2007
Transient Variations in Emerging SOI Technologies: Modeling and Impact on Analog/Mixed-Signal Circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Advances in Multi-Gate MOSFET Circuit Design.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

Analog design challenges and trade-offs using emerging materials and devices.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

Layout options for stability tuning of SRAM cells in multi-gate-FET technologies.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2005
Dynamic state-retention flip flop for fine-grained sleep-transistor scheme.
Proceedings of the 31st European Solid-State Circuits Conference, 2005


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