Michael Fragano

According to our database, Michael Fragano authored at least 4 papers between 2004 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

1.4Gsearch/s 2-Mb/mm² TCAM Using Two-Phase-Pre-Charge ML Sensing and Power-Grid Pre-Conditioning to Reduce Ldi/dt Power-Supply Noise by 50%.

Igor Arsovski, Akhilesh Patil, Robert M. Houle, Michael Fragano, Ramon Rodriguez, Raymond Kim, Van Butler

IEEE J. Solid State Circuits, 2018

2017

12.4 1.4Gsearch/s 2Mb/mm² TCAM using two-phase-precharge ML sensing and power-grid preconditioning to reduce Ldi/dt power-supply noise by 50%.

Igor Arsovski, Michael Fragano, Robert M. Houle, Akhilesh Patil, Van Butler, Raymond Kim, Ramon Rodriguez, Tom Maffitt, Joseph J. Oler, John Goss, Christopher Parkinson, Michael A. Ziegerhofer, Steven Burns

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2007

A 550ps Access-Time Compilable SRAM in 65nm CMOS Technology.

Larry Wissel, Harold Pilo, Chris LeBlanc, Xiaopeng Wang, Steve Lamphier, Michael Fragano

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2004

BIST controlled variable sense amp timing for 90nm embedded SRAM.

Ciaran J. Brennan, Steven Eustis, John Goss, A. Humphrey, Michael Ouellette, Jeremy Rowland, Michael Fragano

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004