Michael Dreschmann

According to our database1, Michael Dreschmann authored at least 14 papers between 2007 and 2015.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2015
A Framework for Multi-FPGA Interconnection using Multi Gigabit Transceivers.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

Multiplier-free carrier-phase recovery for real-time receivers using processing in polar coordinates.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015

2014
An ultra-high speed OFDMA system for optical access networks.
Proceedings of the International Conference on Computing, Networking and Communications, 2014

Flexible real-time transmitter at 10 Gbit/s for SCFDMA PONs focusing on low-cost ONUs.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

2013
Colorless FDMA-PON With Flexible Bandwidth Allocation and Colorless, Low-Speed ONUs [Invited].
JOCN, 2013

A novel system on chip for software-defined, high-speed OFDM signal processing.
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013

Addiguration: Exploring configuration behavior of Spartan-3 devices.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

Flexible WDM-PON with Nyquist-FDM and 31.25 Gbit/s per wavelength channel using colorless, low-speed ONUs.
Proceedings of the 2013 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference (OFC/NFOEC), 2013

2012
Single-Laser 325 Tbit/s Nyquist WDM Transmission.
JOCN, 2012

Single-laser 32.5 Tbit/s Nyquist WDM transmission
CoRR, 2012

Time and frequency synchronization for ultra-high speed OFDM systems.
Proceedings of the International Conference on Computing, Networking and Communications, 2012

2010
Reconfigurable Hardware for Power-over-Fiber Applications.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009
RTL-to-layout implementation of an embedded coarse grained architecture for dynamically reconfigurable computing in systems-on-chip.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

2007
Implementation of a Virtual Internal Configuration Access Port (JCAP) for Enabling Partial Self-Reconfiguration on Xilinx Spartan III FPGAs.
Proceedings of the FPL 2007, 2007


  Loading...