Michael D'Addeo

According to our database, Michael D'Addeo authored at least 3 papers between 1997 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

A Sub-2 W Low Power IA Processor for Mobile Internet Devices in 45 nm High-k Metal Gate CMOS.

Gianfranco Gerosa, Steve Curtis, Michael D'Addeo, Bo Jiang, Belliappa Kuttanna, Feroze Merchant, Binta Patel, Mohammed H. Taufique, Haytham Samarchi

IEEE J. Solid State Circuits, 2009

2008

A Sub-1W to 2W Low-Power IA Processor for Mobile Internet Devices and Ultra-Mobile PCs in 45nm Hi-Κ Metal Gate CMOS.

Gianfranco Gerosa, Steve Curtis, Michael D'Addeo, Bo Jiang, Belliappa Kuttanna, Feroze Merchant, Binta Patel, Mohammed H. Taufique, Haytham Samarchi

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

1997

A 250-MHz 5-W PowerPC microprocessor with on-chip L2 cache controller.

Gianfranco Gerosa, Mike Alexander, Jose Alvarez, Cody Croxton, Michael D'Addeo, A. Richard Kennedy, Carmine Nicoletta, James P. Nissen, Ross Philip, Paul Reed, Hector Sanchez, Scott A. Taylor, Brad Burgess

IEEE J. Solid State Circuits, 1997