Michael B. Taylor
Orcid: 0000-0002-4074-6347Affiliations:
- University of Washington, Paul Allen School of Computer Science and Engineering, Seattle, WA, USA (since 2017)
- University of California, San Diego, CA, USA (2005-2016)
- Massachusetts Institute of Technology (MIT), Cambridge, MA, USA (PhD 2007)
According to our database1,
Michael B. Taylor
authored at least 75 papers
between 1997 and 2024.
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Bibliography
2024
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024
2023
RISE: RISC-V SoC for En/Decryption Acceleration on the Edge for Homomorphic Encryption.
IEEE Trans. Very Large Scale Integr. Syst., October, 2023
Chiplet Cloud: Building AI Supercomputers for Serving Large Generative Language Models.
CoRR, 2023
Proceedings of the 29th Annual International Conference on Mobile Computing and Networking, 2023
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2023
Beyond Static Parallel Loops: Supporting Dynamic Task Parallelism on Manycore Architectures with Software-Managed Scratchpad Memories.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023
2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
CoRR, 2022
RACE: RISC-V SoC for En/decryption Acceleration on the Edge for Homomorphic Computation.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
2021
Proceedings of the MAPS@PLDI 2021: Proceedings of the 5th ACM SIGPLAN International Symposium on Machine Programming, 2021
η-LSTM: Co-Designing Highly-Efficient Large LSTM Training via Exploiting Memory-Saving and Architectural Design Opportunities.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
DirectFuzz: Automated Test Generation for RTL Designs using Directed Graybox Fuzzing.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021
2020
IEEE Micro, 2020
A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator.
IEEE J. Solid State Circuits, 2020
Commun. ACM, 2020
Proceedings of the 14th IEEE/ACM International Symposium on Networks-on-Chip, 2020
Proceedings of the 14th IEEE/ACM International Symposium on Networks-on-Chip, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
2019
Commun. ACM, 2019
A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
2018
ACM SIGOPS Oper. Syst. Rev., 2018
The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips.
IEEE Micro, 2018
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017
2016
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016
Proceedings of the 2016 International Symposium on Code Generation and Optimization, 2016
2014
Exploring Energy Scalability in Coprocessor-Dominated Architectures for Dark Silicon.
ACM Trans. Embed. Comput. Syst., 2014
Quality Time: A simple online technique for quantifying multicore execution efficiency.
Proceedings of the 2014 IEEE International Symposium on Performance Analysis of Systems and Software, 2014
Proceedings of the 2014 IEEE International Symposium on Workload Characterization, 2014
2013
TimeCube: A manycore embedded processor with interference-agnostic progress tracking.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013
Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization, 2013
Proceedings of the International Conference on Compilers, 2013
2012
Is dark silicon useful?: harnessing the four horsemen of the coming dark silicon apocalypse.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
The GreenDroid Mobile Application Processor: An Architecture for Silicon's Dark Future.
IEEE Micro, 2011
IEEE Commun. Mag., 2011
Proceedings of the 16th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2011
Proceedings of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation, 2011
Proceedings of the 26th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2011
QsCores: trading dark silicon for scalable energy efficiency with quasi-specific cores.
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011
Proceedings of the 3rd USENIX Workshop on Hot Topics in Parallelism, 2011
An Evaluation of Selective Depipelining for FPGA-Based Energy-Reducing Irregular Code Coprocessors.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
2010
Proceedings of the 2010 IEEE Hot Chips 22 Symposium, Stanford, CA, USA, August 22-24, 2010, 2010
Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010
2009
Proceedings of the Multicore Processors and Systems, 2009
ACM Trans. Design Autom. Electr. Syst., 2009
Proceedings of the 2009 IEEE International Symposium on Workload Characterization, 2009
2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
2007
Proceedings of the Runtime Verification, 7th International Workshop, 2007
Proceedings of the 25th International Conference on Computer Design, 2007
2005
2004
Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams.
Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004
2003
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003
2002
The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs.
IEEE Micro, 2002
1997
Proceedings of the 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 1997