Michael B. Henry
According to our database1,
Michael B. Henry
authored at least 23 papers
between 2008 and 2022.
Collaborative distances:
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Bibliography
2022
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2017
Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II - Data Communication, Energy Harvesting, Power Management, and Digital Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part I - Analog Circuit Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
2016
24.3 A 36.8 2b-TOPS/W self-calibrating GPS accelerator implemented using analog calculation in 65nm LP CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2014
An Energy Efficient Full-Frame Feature Extraction Accelerator With Shift-Latch FIFO in 28 nm CMOS.
IEEE J. Solid State Circuits, 2014
16.3 A 23Mb/s 23pJ/b fully synthesized true-random-number generator in 28nm and 65nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
27.8 A static contention-free single-phase-clocked 24T flip-flop in 45nm for low-power applications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2013
Fast Approximation Framework for Timing and Power Analysis of Ultra-Low-Voltage Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
Microprocess. Microsystems, 2013
2012
Design of energy-efficient, adaptable throughput systems at near/sub-threshold voltage.
ACM Trans. Design Autom. Electr. Syst., 2012
ACM J. Emerg. Technol. Comput. Syst., 2012
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Hybrid Super/Subthreshold Design of a Low Power Scalable-Throughput FFT Architecture.
Trans. High Perform. Embed. Archit. Compil., 2011
Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011
A case for NEMS-based functional-unit power gating of low-power embedded microprocessors.
Proceedings of the 48th Design Automation Conference, 2011
2010
Proceedings of the Design, Automation and Test in Europe, 2010
2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
A low-power parallel design of discrete wavelet transform using subthreshold voltage technology.
Proceedings of the 2008 International Conference on Compilers, 2008