Michael A. Riepe

According to our database1, Michael A. Riepe authored at least 4 papers between 1996 and 2003.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2003
Transistor placement for noncomplementary digital VLSI cell synthesis.
ACM Trans. Design Autom. Electr. Syst., 2003

1999
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis.
Proceedings of the 1999 International Symposium on Physical Design, 1999

1998
The edge-based design rule model revisited.
ACM Trans. Design Autom. Electr. Syst., 1998

1996
Ravel-XL: a hardware accelerator for assigned-delay compiled-code logic gate simulation.
IEEE Trans. Very Large Scale Integr. Syst., 1996


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