Metha Jeeradit

According to our database, Metha Jeeradit authored at least 10 papers between 2003 and 2010.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2010

Nano-magnetic non-volatile CMOS circuits for nano-scale FPGAs (abstract only).

Larkhoon Leem, James A. Weaver, Metha Jeeradit, James S. Harris Jr.

Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

Intent-leveraged optimization of analog circuits via homotopy.

Metha Jeeradit, Jaeha Kim, Mark Horowitz

Proceedings of the Design, Automation and Test in Europe, 2010

Fortifying analog models with equivalence checking and coverage analysis.

Mark Horowitz, Metha Jeeradit, Frances Lau, Sabrina Liao, ByongChan Lim, James Mao

Proceedings of the 47th Design Automation Conference, 2010

2009

Leveraging designer's intent: A path toward simpler analog CAD tools.

Jaeha Kim, Metha Jeeradit, ByongChan Lim, Mark A. Horowitz

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008

A 12-GS/s Phase-Calibrated CMOS Digital-to-Analog Converter for Backplane Communications.

Jafar Savoj, Aliazam Abbasfar, Amir Amirkhany, Metha Jeeradit, Bruno W. Garlepp

IEEE J. Solid State Circuits, 2008

A 24 Gb/s Software Programmable Analog Multi-Tone Transmitter.

Amir Amirkhany, Aliazam Abbasfar, Jafar Savoj, Metha Jeeradit, Bruno W. Garlepp, Ravi T. Kollipara, Vladimir Stojanovic, Mark Horowitz

IEEE J. Solid State Circuits, 2008

Impulse sensitivity function analysis of periodic circuits.

Jaeha Kim, Brian S. Leibowitz, Metha Jeeradit

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

2007

A 7.5Gb/s 10-Tap DFE Receiver with First Tap Partial Response, Spectrally Gated Adaptation, and 2nd-Order Data-Filtered CDR.

Brian S. Leibowitz, Jade Kizer, Haechang Lee, Fred Chen, Andrew Ho, Metha Jeeradit, Akash Bansal, Trey Greer, Simon Li, Ramin Farjad-Rad, William F. Stonecypher, Yohan Frans, Barry Daly, Fred Heaton, Bruno W. Garlepp, Carl W. Werner, Nhat Nguyen, Vladimir Stojanovic, Jared Zerbe

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2005

Modeling, simulation, and design of a multi-mode 2-10 Gb/sec fully adaptive serial link system.

Carl W. Werner, C. Hoyer, Andrew Ho, Metha Jeeradit, Fred Chen, Bruno W. Garlepp, Bill Stonecypher, Simon Li, Akash Bansal, Amita Agarwal, Elad Alon, Vladimir Stojanovic, Jared Zerbe

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2003

Compressing Extended Program Traces Using Value Predictors.

Martin Burtscher, Metha Jeeradit

Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques (PACT 2003), 27 September, 2003