Menka Tewani

According to our database, Menka Tewani authored at least 1 paper in 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2008

0.35µ, 1 GHz, CMOS Timing Generator Using Array of Digital Delay Lock Loops.

Balaji Srinivasan, Vinay Bhaskar Chandratre, Menka Tewani

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008