Mengying Zhao

Orcid: 0000-0001-7891-5436

According to our database1, Mengying Zhao authored at least 95 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Introduction to Special Issue on In/Near Memory and Storage Computing for Embedded Systems.
ACM Trans. Embed. Comput. Syst., November, 2024

An improved classification diagnosis approach for cervical images based on deep neural networks.
Pattern Anal. Appl., September, 2024

Branch Predictor Design for Energy Harvesting Powered Nonvolatile Processors.
IEEE Trans. Computers, March, 2024

Unity is Power: Semi-Asynchronous Collaborative Training of Large-Scale Models with Structured Pruning in Resource-Limited Clients.
CoRR, 2024

Federation-Paced Learning: Towards Efficient Federated Learning with Synchronized Pace.
Proceedings of the ECAI 2024 - 27th European Conference on Artificial Intelligence, 19-24 October 2024, Santiago de Compostela, Spain, 2024

Towards Efficient Reconfiguration through Lightweight Input Inversion for MLC NVFPGAs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Towards High-Throughput Neural Network Inference with Computational BRAM on Nonvolatile FPGAs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Decentralized Federated Learning in Partially Connected Networks with Non-IID Data.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Cache-aware Task Decomposition for Efficient Intermittent Computing Systems.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Course Reform Incorporating Ideological and Political Education in Computer Organization and Design.
Proceedings of the ACM Turing Award Celebration Conference 2024, 2024

2023
Mapping Forage Biomass and Quality of the Inner Mongolia Grasslands by Combining Field Measurements and Sentinel-2 Observations.
Remote. Sens., April, 2023

RAB: Recomputation Aided Backup for Energy Efficient Non-volatile Processors.
Proceedings of the 38th ACM/SIGAPP Symposium on Applied Computing, 2023

FedQL: Q-Learning Guided Aggregation for Federated Learning.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2023

Correlation-guided Placement for Nonvolatile FPGAs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Reinforcement Learning-Assisted Management for Convertible SSDs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
DQN based page allocation for ReRAM main memory.
Microprocess. Microsystems, March, 2022

Adaptive Mode Transformation for Wear Leveling in Nonvolatile FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Deep Reinforcement-Learning-Guided Backup for Energy Harvesting Powered Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Lifetime improvement through adaptive reconfiguration for nonvolatile FPGAs.
J. Syst. Archit., 2022

WGeod: A General and Efficient FPGA Accelerator for Object Detection.
Proceedings of the IEEE Intl Conf on Parallel & Distributed Processing with Applications, 2022

2021
Pearl: Performance-Aware Wear Leveling for Nonvolatile FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

A lightweight online backup manager for energy harvesting powered nonvolatile processor systems.
J. Syst. Archit., 2021

Fast-convergent federated learning with class-weighted aggregation.
J. Syst. Archit., 2021

Improving CNN performance on FPGA clusters through topology exploration.
Proceedings of the SAC '21: The 36th ACM/SIGAPP Symposium on Applied Computing, 2021

A flexible 3D force sensor for handwriting recognition.
Proceedings of the 14th International Congress on Image and Signal Processing, 2021

2020
Applying Multiple Level Cell to Non-volatile FPGAs.
ACM Trans. Embed. Comput. Syst., 2020

A Highly Parallelized PIM-Based Accelerator for Transaction-Based Blockchain in IoT Environment.
IEEE Internet Things J., 2020

CLOCK-RWRF: A Read-Write-Relative-Frequency Page Replacement Algorithm for PCM and DRAM of Hybrid Memory.
Proceedings of the 22nd IEEE International Conference on High Performance Computing and Communications; 18th IEEE International Conference on Smart City; 6th IEEE International Conference on Data Science and Systems, 2020

ResiRCA: A Resilient Energy Harvesting ReRAM Crossbar-Based Accelerator for Intelligent Embedded Processors.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

Design Insights of Non-volatile Processors and Accelerators in Energy Harvesting Systems.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

Maximizing CNN Throughput on FPGA Clusters.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Q-learning Based Backup for Energy Harvesting Powered Embedded Systems.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

PattPIM: A Practical ReRAM-Based DNN Accelerator by Reusing Weight Pattern Repetitions.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Checkpointing-Aware Loop Tiling for Energy Harvesting Powered Nonvolatile Processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

EMC: Energy-Aware Morphable Cache Design for Non-Volatile Processors.
IEEE Trans. Computers, 2019

Re-Tangle: A ReRAM-based Processing-in-Memory Architecture for Transaction-based Blockchain.
Proceedings of the International Conference on Computer-Aided Design, 2019

Dynamically Reconfigurable Architecture for High-Throughput Hash Function in Key-Value Store.
Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019

Performance-aware Wear Leveling for Block RAM in Nonvolatile FPGAs.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
Avoiding Data Inconsistency in Energy Harvesting Powered Embedded Systems.
ACM Trans. Design Autom. Electr. Syst., 2018

Shared Last-Level Cache Management and Memory Scheduling for GPGPUs with Hybrid Main Memory.
ACM Trans. Embed. Comput. Syst., 2018

NVM-Based FPGA Block RAM With Adaptive SLC-MLC Conversion.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

H<sup>2</sup>-RAID: A Novel Hybrid RAID Architecture Towards High Reliability.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2018

Set variation-aware shared LLC management for CPU-GPU heterogeneous architecture.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
State Asymmetry Driven State Remapping in Phase Change Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Stack-Size Sensitive On-Chip Memory Backup for Self-Powered Nonvolatile Processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Asymmetric Error Rates of Cell States Exploration for Performance Improvement on Flash Memory Based Storage Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Data Backup Optimization for Nonvolatile SRAM in Energy Harvesting Sensor Nodes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Energy optimization for multi-level cell non-volatile memory using state remapping.
Microprocess. Microsystems, 2017

Data re-allocation enabled cache locking for embedded systems.
J. Syst. Archit., 2017

Energy-aware morphable cache management for self-powered non-volatile processors.
Proceedings of the 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2017

An empirical study of F2FS on mobile devices.
Proceedings of the 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2017

Runtime and reconfiguration dual-aware placement for SRAM-NVM hybrid FPGAs.
Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017

Unified nvTCAM and sTCAM architecture for improving packet matching performance.
Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, 2017

Design Exploration for Multiple Level Cell Based Non-Volatile FPGAs.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Shared last-level cache management for GPGPUs with hybrid main memory.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Maximizing Forward Progress with Cache-aware Backup for Self-powered Non-volatile Processors.
Proceedings of the 54th Annual Design Automation Conference, 2017

Cooperative DVFS for energy-efficient HEVC decoding on embedded CPU-GPU architecture.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory Storage Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Retention Trimming for Lifetime Improvement of Flash Memory Storage Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Redesigning software and systems for non-volatile processors on self-powered devices.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

Multipath Load Balancing in SDN/OSPF Hybrid Network.
Proceedings of the Network and Parallel Computing, 2016

A Novel Page Caching Policy for PCM and DRAM of Hybrid Memory Architecture.
Proceedings of the 13th International Conference on Embedded Software and Systems, 2016

Energy Optimization for Multi-level Cell STT-MRAM Using State Remapping.
Proceedings of the 18th IEEE International Conference on High Performance Computing and Communications; 14th IEEE International Conference on Smart City; 2nd IEEE International Conference on Data Science and Systems, 2016

Write-back aware shared last-level cache management for hybrid main memory.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Checkpoint aware hybrid cache architecture for NV processor in energy harvesting powered systems.
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016

2015
Joint Profit and Process Variation Aware High Level Synthesis With Speed Binning.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Joint WCET and Update Activity Minimization for Cyber-Physical Systems.
ACM Trans. Embed. Comput. Syst., 2015

Wear Relief for High-Density Phase Change Memory Through Cell Morphing Considering Process Variation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Modular Performance Analysis of Energy-Harvesting Real-Time Networked Systems.
Proceedings of the 2015 IEEE Real-Time Systems Symposium, 2015

C3: Cooperative Code Positioning and Cache Locking for WCET Minimization.
Proceedings of the 21st IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2015

Improving MLC PCM write throughput by write reconstruction.
Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

Software assisted non-volatile register reduction for energy harvesting based cyber-physical system.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Fixing the broken time machine: consistency-aware checkpointing for energy harvesting powered non-volatile processor.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Compiler directed automatic stack trimming for efficient non-volatile processors.
Proceedings of the 52nd Annual Design Automation Conference, 2015

Minimizing MLC PCM write energy for free through profiling-based state remapping.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
Compiler-Assisted STT-RAM-Based Hybrid Cache for Energy Efficient Embedded Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Branch Prediction-Directed Dynamic Instruction Cache Locking for Embedded Systems.
ACM Trans. Embed. Comput. Syst., 2014

Error Model Guided Joint Performance and Endurance Optimization for Flash Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Migration-Aware Loop Retiming for STT-RAM-Based Hybrid Cache in Embedded Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Exploiting parallelism in I/O scheduling for access conflict minimization in flash-based solid state drives.
Proceedings of the IEEE 30th Symposium on Mass Storage Systems and Technologies, 2014

Sleep-aware variable partitioning for energy-efficient hybrid PRAM and DRAM main memory.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

Leveling to the last mile: Near-zero-cost bit level wear leveling for PCM-based main memory.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

SLC-enabled Wear Leveling for MLC PCM Considering Process Variation.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Retention Trimming for Wear Reduction of Flash Memory Storage Systems.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Online OLED dynamic voltage scaling for video streaming applications on mobile devices.
SIGBED Rev., 2013

Data re-allocation enabled cache locking for embedded systems.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Profit maximization through process variation aware high level synthesis with speed binning.
Proceedings of the Design, Automation and Test in Europe, 2013

Online OLED dynamic voltage scaling for video streaming applications on mobile devices.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

WUCC: Joint WCET and Update Conscious Compilation for cyber-physical systems.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

Migration-aware loop retiming for STT-RAM based hybrid cache for embedded systems.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2012
Compiler-assisted preferred caching for embedded systems with STT-RAM based hybrid cache.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2012

WCET-aware re-scheduling register allocation for real-time embedded systems with clustered VLIW architecture.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2012

Active compensation technique for the thin-film transistor variations and OLED aging of mobile device displays.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Mobile devices user - The subscriber and also the publisher of real-time OLED display power management plan.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Quality-retaining OLED dynamic voltage scaling for video streaming applications on mobile devices.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012


  Loading...