Mengquan Li
Orcid: 0000-0002-9385-734X
According to our database1,
Mengquan Li
authored at least 36 papers
between 2015 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
ACM Trans. Parallel Comput., June, 2024
Automated Optical Accelerator Search Toward Superior Acceleration Efficiency, Inference Robustness, and Development Speed.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024
AyE-Edge: Automated Deployment Space Search Empowering Accuracy yet Efficient Real-Time Object Detection on the Edge.
CoRR, 2024
2023
Automated Optical Accelerator Search: Expediting Green and Ubiquitous DNN-Powered Intelligence.
IEEE Des. Test, December, 2023
An Efficient Hierarchical-Reduction Architecture for Aggregation in Route Travel Time Estimation.
IEEE Trans. Parallel Distributed Syst., September, 2023
Microprocess. Microsystems, 2023
RLAlloc: A Deep Reinforcement Learning-Assisted Resource Allocation Framework for Enhanced Both I/O Throughput and QoS Performance of Multi-Streamed SSDs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
FIONA: Fine-grained Incoherent Optical DNN Accelerator Search for Superior Efficiency and Robustness.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
IEEE Trans. Computers, 2022
LDP: Learnable Dynamic Precision for Efficient Deep Neural Network Training and Inference.
CoRR, 2022
2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Reduced Worst-Case Communication Latency Using Single-Cycle Multihop Traversal Network-on-Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Attack Mitigation of Hardware Trojans for Thermal Sensing via Micro-ring Resonator in Optical NoCs.
ACM J. Emerg. Technol. Comput. Syst., 2021
O-HAS: Optical Hardware Accelerator Search for Boosting Both Acceleration Performance and Development Speed.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
2020
Hardware-Software Collaborative Thermal Sensing in Optical Network-on-Chip-based Manycore Systems.
ACM Trans. Embed. Comput. Syst., 2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Routing in optical network-on-chip: minimizing contention with guaranteed thermal reliability.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
2018
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Proceedings of the 24th IEEE International Conference on Parallel and Distributed Systems, 2018
User Experience-Enhanced and Energy-Efficient Task Scheduling on Heterogeneous Multi-Core Mobile Systems.
Proceedings of the 24th IEEE International Conference on Parallel and Distributed Systems, 2018
Communication optimization for thermal reliable optical network-on-chip: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2018
2017
FoToNoC: A Folded Torus-Like Network-on-Chip Based Many-Core Systems-on-Chip in the Dark Silicon Era.
IEEE Trans. Parallel Distributed Syst., 2017
Future Gener. Comput. Syst., 2017
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Fixed priority scheduling of real-time flows with arbitrary deadlines on smart NoCs: work-in-progress.
Proceedings of the Thirteenth ACM International Conference on Embedded Software 2017 Companion, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
Application Mapping and Scheduling for Network-on-Chip-Based Multiprocessor System-on-Chip With Fine-Grain Communication Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2016
FoToNoC: A hierarchical management strategy based on folded lorus-like Network-on-Chip for dark silicon many-core systems.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
Traffic-Aware Application Mapping for Network-on-Chip Based Multiprocessor System-on-Chip.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015
An Efficient Technique for Chip Temperature Optimization of Multiprocessor Systems in the Dark Silicon Era.
Proceedings of the 17th IEEE International Conference on High Performance Computing and Communications, 2015