We stand with Ukraine

We stand with Ukraine

Meng-Lin Yu

Orcid: 0000-0003-2659-3783

According to our database¹, Meng-Lin Yu authored at least 23 papers between 1986 and 2023.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Links

On csauthors.net:

Bibliography

2023

Efficient Deployment of UWB Anchors for Wide-Area Positioning Coverage Using Bipartite Graph.

[BibT_eX]

[DOI]

,

,

IEEE Access, 2023

2012

TCU: Thread compaction unit for GPGPU applications on mobile graphics hardware.

[BibT_eX]

[DOI]

,

,

,

Chia-Ming Chang

,

Proceedings of the 14th IEEE International Workshop on Multimedia Signal Processing, 2012

2002

10- and 40-Gb/s forward error correction devices for optical communications.

[BibT_eX]

[DOI]

,

,

Michael S. Shaffer

IEEE J. Solid State Circuits, 2002

Equalization and FEC techniques for optical transceivers.

[BibT_eX]

[DOI]

,

Erich F. Haratsch

,

,

,

Jeffrey H. Saunders

,

Michael Shaffer

,

,

IEEE J. Solid State Circuits, 2002

The use of reduced two's-complement representation in low-power DSP design.

[BibT_eX]

[DOI]

,

,

,

Alan N. Willson Jr.

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A low power adaptive filter using dynamic reduced 2's-complement representation.

[BibT_eX]

[DOI]

,

,

,

Alan N. Willson Jr.

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001

Signal Representation Guided Synthesis Using Carry-Save Adders For Synchronous Data-path Circuits.

[BibT_eX]

[DOI]

,

,

Alan N. Willson Jr.

Proceedings of the 38th Design Automation Conference, 2001

DSP techniques for optical transceivers.

[BibT_eX]

[DOI]

,

,

,

,

Jeffrey H. Saunders

,

,

,

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000

VLSI design of Reed-Solomon decoder architectures.

[BibT_eX]

[DOI]

,

,

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1995

An Asynchronous Distributed Approach for the Simulation of Behavior-Level Models on Parallel Processors.

[BibT_eX]

[DOI]

,

IEEE Trans. Parallel Distributed Syst., 1995

YADDES: a novel algorithm for deadlock-free distributed discrete-event simulation.

[BibT_eX]

[DOI]

,

Erik DeBenedictis

,

Int. J. Comput. Simul., 1995

1994

VLSI timing simulation with selective dynamic regionization.

[BibT_eX]

[DOI]

,

Bryan D. Ackland

Proceedings of the Proceedings 27th Annual Simulation Symposium, 1994

1993

Hazard-Free Asynchronous Circuit Synthesis.

[BibT_eX]

,

P. A. Subrahmanyam

Proceedings of the Asynchronous Design Methodologies, Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March, 1993

Specification and Synthesis of Mixed-Mode Systems: Experiments in a VHDL Environment.

[BibT_eX]

[DOI]

P. A. Subrahmanyam

,

Josep M. Espinalt

,

Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993

1992

A Path-Oriented Approach for Reducing Hazards in Asynchronous Designs.

[BibT_eX]

[DOI]

,

P. A. Subrahmanyam

Proceedings of the 29th Design Automation Conference, 1992

En route to more efficient conservative parallel event simulation.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 25th Annual Simulation Symposium (ANSS-25 1992), 1992

1991

A Novel Algorithm for Discrete-Event Simulation: Asynchronous Distributed Discrete-Event Simulation Algorithm for Cyclic Circuits Using A Dataflow Network.

[BibT_eX]

[DOI]

Erik DeBenedictis

,

,

Computer, 1991

A provably correct, non-deadlocking parallel event simulation algorithm.

[BibT_eX]

[DOI]

,

,

Erik DeBenedictis

Proceedings of the Proceedings 24th Annual Simulation Symposium (ANSS-24 1991), 1991

1990

Differential fault simulation for sequential circuits.

[BibT_eX]

[DOI]

,

J. Electron. Test., 1990

1989

A Preemtive Scheduling Mechanism for Accurate Behavioral Simulation of Digital Designs.

[BibT_eX]

[DOI]

,

IEEE Trans. Computers, 1989

A Study of the Applicability of Hopfield Decision Neural Nets to VLSI CAD.

[BibT_eX]

[DOI]

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

Differential Fault Simulation - a Fast Method Using Minimal Memory.

[BibT_eX]

[DOI]

,

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1986

Automatic Random Logic Layout Synthesis - a Module Generator Approach (VlSI, Silicon Compilation, Design Automation, Cell Synthesis, Grid)

[BibT_eX]

[DOI]

PhD thesis, 1986

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