Meng-Chun Shih

According to our database, Meng-Chun Shih authored at least 3 papers between 2019 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Demonstration of High Endurance Capability on Mega-Bit RRAM Macro and Model of ppm Level Failures.

Chang-Feng Yang, Chun-Yu Wu, Meng-Chun Shih, Ming-Ta Yang, Ming-Han Yang, Yu-Tien Wu, Ta-Chun Chien, Chih-Wei Lai, Shih-Chi Tsai, Wen-Ting Chu, Arthur Hung

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2020

13.3 A 22nm 32Mb Embedded STT-MRAM with 10ns Read Speed, 1M Cycle Write Endurance, 10 Years Retention at 150°C and High Immunity to Magnetic Field Interference.

Yu-Der Chih, Yi-Chun Shih, Chia-Fu Lee, Yen-An Chang, Po-Hao Lee, Hon-Jarn Lin, Yu-Lin Chen, Chieh-Pu Lo, Meng-Chun Shih, Kuei-Hung Shen, Harry Chuang, Tsung-Yung Jonathan Chang

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019

Recent Progress and Next Directions for Embedded MRAM Technology.

William J. Gallagher, Eric Chien, Tien-Wei Chiang, Jian-Cheng Huang, Meng-Chun Shih, C. Y. Wang, Christine Bair, George Lee, Yi-Chun Shih, Chia-Fu Lee, Roger Wang, Kuei-Hung Shen, J. J. Wu, Wayne Wang, Harry Chuang

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019