Mehrnaz Ahmadi

Orcid: 0000-0002-2235-5035

According to our database1, Mehrnaz Ahmadi authored at least 11 papers between 2015 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Generative-Neural-Networks-Based PV-Aware Analog Layout Correction.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

Reinforcement-Learning-based Mixed-Signal IC Placement for Fogging Effect Control.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Fogging-Effect-Aware Mixed-Signal IC Placement with Reinforcement Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
Generalized support vector machines (GSVMs) model for real-world time series forecasting.
Soft Comput., 2021

Current status of hybrid structures in wind forecasting.
Eng. Appl. Artif. Intell., 2021

Analog Layout Placement for FinFET Technology Using Reinforcement Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2019
A Dynamic Timing Error Avoidance Technique Using Prediction Logic in High-Performance Designs.
IEEE Trans. Very Large Scale Integr. Syst., 2019

2017
A Hybrid Time Borrowing Technique to Improve the Performance of Digital Circuits in the Presence of Variations.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

Systematic approximate logic optimization using don't care conditions.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

2016
A novel technique to detect Aging in analog/mixed-signal circuits.
Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

2015
A Timing Error Mitigation Technique for High Performance Designs.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015


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