Mehrdad Reshadi
According to our database1,
Mehrdad Reshadi
authored at least 25 papers
between 2002 and 2015.
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Collaborative distances:
Timeline
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Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2015
Proceedings of the 2015 IEEE International Conference on Multimedia and Expo, 2015
Proceedings of the 2015 IEEE International Conference on Multimedia and Expo, 2015
2014
Proceedings of the 10th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2014
2013
Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2013
Proceedings of the DLS'13, 2013
2012
Proceedings of the 2012 IEEE International Symposium on Workload Characterization, 2012
2009
Hybrid-compiled simulation: An efficient technique for instruction-set architecture simulation.
ACM Trans. Embed. Comput. Syst., 2009
2008
ACM Trans. Reconfigurable Technol. Syst., 2008
Proceedings of the 45th Design Automation Conference, 2008
2007
Interrupt and low-level programming support for expanding the application domain of statically-scheduled horizontal-microcoded architectures in embedded systems.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
ACM Trans. Embed. Comput. Syst., 2006
Generic Processor Modeling for Automatically Generating Very Fast Cycle-Accurate Simulators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
Aspect-Oriented Architecture Description for Retargetable Compilation, Simulation and Synthesis of Application-Specific Pipelined Datapaths .
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005
Generic Pipelined Processor Modeling and High Performance Cycle-Accurate Simulator Generation.
Proceedings of the 2005 Design, 2005
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation.
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003
2002
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002