Mehrdad Poorhosseini

According to our database, Mehrdad Poorhosseini authored at least 5 papers between 2018 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2023

A hybrid RISC-V architecture supporting mixed timing-critical and high performance workloads.

Mehrdad Poorhosseini

PhD thesis, 2023

A RISC-V based platform supporting mixed timing-critical and high performance workloads.

Mehrdad Poorhosseini, Kim Grüttner

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

2020

A Compiler Comparison in the RISC-V Ecosystem.

Mehrdad Poorhosseini, Wolfgang Nebel, Kim Grüttner

Proceedings of the 2020 International Conference on Omni-layer Intelligent Systems, 2020

2019

Novel Architecture for Low-Power CNTFET-Based Compressors.

Morteza Dadashi Gavaber, Mehrdad Poorhosseini, Saadat Pourmozafari

J. Circuits Syst. Comput., 2019

2018

A Fault-Tolerant and Efficient XOR Structure for Modular Design of Complex QCA Circuits.

Mehrdad Poorhosseini, Ali Reza Hejazi

J. Circuits Syst. Comput., 2018