Mehrdad Morsali

Orcid: 0000-0003-3394-1598

According to our database1, Mehrdad Morsali authored at least 16 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
PiPSim: A Behavior-Level Modeling Tool for CNN Processing-in-Pixel Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

A Near-Sensor Processing Accelerator for Approximate Local Binary Pattern Networks.
IEEE Trans. Emerg. Top. Comput., 2024

A Dataset for Large Language Model-Driven AI Accelerator Generation.
CoRR, 2024

Energy-Efficient Near-Sensor Event Detector Based on Multilevel Ga2O3 RRAM.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

OISA: Architecting an Optical In-Sensor Accelerator for Efficient Visual Computing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Lightator: An Optical Near-Sensor Accelerator with Compressive Acquisition Enabling Versatile Image Processing.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
Enabling Normally-off In-Situ Computing with a Magneto-Electric FET-based SRAM Design.
CoRR, 2023

Comparative Study of Low Bit-width DNN Accelerators: Opportunities and Challenges.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

XOR-CiM: An Efficient Computing-in-SOT-MRAM Design for Binary Neural Network Acceleration.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

NeSe: Near-Sensor Event-Driven Scheme for Low Power Energy Harvesting Sensors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Deep Mapper: A Multi-Channel Single-Cycle Near-Sensor DNN Accelerator.
Proceedings of the IEEE International Conference on Rebooting Computing, 2023

IMA-GNN: In-Memory Acceleration of Centralized and Decentralized Graph Neural Networks at the Edge.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

P-PIM: A Parallel Processing-in-DRAM Framework Enabling Row Hammer Protection.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
A process variation resilient spintronic true random number generator for highly reliable hardware security applications.
Microelectron. J., 2022

2021
Ultra-High-Performance Magnetic Nonvolatile Level Converter Flip-Flop with Spin-Hall Assistance for Dual-Supply Systems with Power Gating Architecture.
Circuits Syst. Signal Process., 2021

2020
NVLCFF: An Energy-Efficient Magnetic Nonvolatile Level Converter Flip-Flop for Ultra-Low-Power Design.
Circuits Syst. Signal Process., 2020


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