Mehrdad Majzoobi

According to our database, Mehrdad Majzoobi authored at least 19 papers between 2008 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2016

A Built-in-Self-Test Scheme for Online Evaluation of Physical Unclonable Functions and True Random Number Generators.

Siam U. Hussain, Mehrdad Majzoobi, Farinaz Koushanfar

IEEE Trans. Multi Scale Comput. Syst., 2016

2014

Robust and Reverse-Engineering Resilient PUF Authentication and Key-Exchange by Substring Matching.

Masoud Rostami, Mehrdad Majzoobi, Farinaz Koushanfar, Dan S. Wallach, Srinivas Devadas

IEEE Trans. Emerg. Top. Comput., 2014

Automated Design, Implementation, and Evaluation of Arbiter-based PUF on FPGA using Programmable Delay Lines.

Mehrdad Majzoobi, Akshat Kharaya, Farinaz Koushanfar, Srinivas Devadas

IACR Cryptol. ePrint Arch., 2014

BIST-PUF: online, hardware-based evaluation of physically unclonable circuit identifiers.

Siam U. Hussain, Sudha Yellapantula, Mehrdad Majzoobi, Farinaz Koushanfar

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Efficient Power and Timing Side Channels for Physical Unclonable Functions.

Ulrich Rührmair, Xiaolin Xu, Jan Sölter, Ahmed Mahmoud, Mehrdad Majzoobi, Farinaz Koushanfar, Wayne P. Burleson

Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2014, 2014

2013

Low-power resource binding by postsilicon customization.

Mehrdad Majzoobi, Joonho Kong, Farinaz Koushanfar

ACM Trans. Design Autom. Electr. Syst., 2013

Combined Modeling and Side Channel Attacks on Strong PUFs.

Ahmed Mahmoud, Ulrich Rührmair, Mehrdad Majzoobi, Farinaz Koushanfar

IACR Cryptol. ePrint Arch., 2013

2012

Slender PUF Protocol: A Lightweight, Robust, and Secure Authentication by Substring Matching.

Mehrdad Majzoobi, Masoud Rostami, Farinaz Koushanfar, Dan S. Wallach, Srinivas Devadas

Proceedings of the 2012 IEEE Symposium on Security and Privacy Workshops, 2012

2011

Time-Bounded Authentication of FPGAs.

Mehrdad Majzoobi, Farinaz Koushanfar

IEEE Trans. Inf. Forensics Secur., 2011

Ultra-low power current-based PUF.

Mehrdad Majzoobi, Golsa Ghiaasi, Farinaz Koushanfar, Sani R. Nassif

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Hybrid modeling of non-stationary process variations.

Eva L. Dyer, Mehrdad Majzoobi, Farinaz Koushanfar

Proceedings of the 48th Design Automation Conference, 2011

FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control.

Mehrdad Majzoobi, Farinaz Koushanfar, Srinivas Devadas

Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2011 - 13th International Workshop, Nara, Japan, September 28, 2011

2010

Nonparametric combinatorial regression for shape constrained modeling.

Farinaz Koushanfar, Mehrdad Majzoobi, Miodrag Potkonjak

IEEE Trans. Signal Process., 2010

FPGA PUF using programmable delay lines.

Mehrdad Majzoobi, Farinaz Koushanfar, Srinivas Devadas

Proceedings of the 2010 IEEE International Workshop on Information Forensics and Security, 2010

Rapid FPGA delay characterization using clock synthesis and sparse sampling.

Mehrdad Majzoobi, Eva L. Dyer, Ahmed Elnably, Farinaz Koushanfar

Proceedings of the 2011 IEEE International Test Conference, 2010

FPGA Time-Bounded Unclonable Authentication.

Mehrdad Majzoobi, Ahmed Elnably, Farinaz Koushanfar

Proceedings of the Information Hiding - 12th International Conference, 2010

2009

Techniques for Design and Implementation of Secure Reconfigurable PUFs.

Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potkonjak

ACM Trans. Reconfigurable Technol. Syst., 2009

2008

Testing Techniques for Hardware Security.

Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potkonjak

Proceedings of the 2008 IEEE International Test Conference, 2008

Lightweight secure PUFs.

Mehrdad Majzoobi, Farinaz Koushanfar, Miodrag Potkonjak

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008