Mehrdad Biglari

According to our database, Mehrdad Biglari authored at least 7 papers between 2016 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Non-Volatile Processor Design for Self-Powered Embedded Systems.

Mehrdad Biglari

PhD thesis, 2022

2020

TReMo: A Model for Ternary ReRAM-Based Memories with Adjustable Write-Verification Capabilities.

Shima Hosseinzadeh, Mehrdad Biglari, Dietmar Fey

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2018

High-Endurance Bipolar ReRAM-Based Non-Volatile Flip-Flops with Run-Time Tunable Resistive States.

Mehrdad Biglari, Tobias Lieske, Dietmar Fey

Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018

Multi-level memristive voltage divider: programming scheme trade-offs.

Tobias Lieske, Mehrdad Biglari, Dietmar Fey

Proceedings of the International Symposium on Memory Systems, 2018

2017

Prototyping memristors in digital system with an FPGA-based testing environment.

Daniel Wust, Mehrdad Biglari, Johannes Knödtel, Marc Reichenbach, Christopher Söll, Dietmar Fey

Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

Memristive voltage divider: a bipolar ReRAM-based unit for non-volatile flip-flops.

Mehrdad Biglari, Dietmar Fey

Proceedings of the International Symposium on Memory Systems, 2017

2016

Using Memristor Technology for Multi-value Registers in Signed-digit Arithmetic Circuits.

Dietmar Fey, Marc Reichenbach, Christopher Söll, Mehrdad Biglari, Jürgen Röber, Robert Weigel

Proceedings of the Second International Symposium on Memory Systems, 2016