Mehmet Meric Isgenc

Orcid: 0000-0003-3601-5530

According to our database1, Mehmet Meric Isgenc authored at least 11 papers between 2017 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
DeepNVM++: Cross-Layer Modeling and Optimization Framework of Nonvolatile Memories for Deep Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Efficient Deep Learning Using Non-Volatile Memory Technology.
CoRR, 2022

2020
Logic IP for Low-Cost IC Design in Advanced CMOS Nodes.
IEEE Trans. Very Large Scale Integr. Syst., 2020

A Probabilistic Synapse With Strained MTJs for Spiking Neural Networks.
IEEE Trans. Neural Networks Learn. Syst., 2020

From Virtual Characterization to Test-Chips: DFM Analysis Through Pattern Enumeration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

DeepNVM++: Cross-Layer Modeling and Optimization Framework of Non-Volatile Memories for Deep Learning.
CoRR, 2020

DeepNVM: A Framework for Modeling and Analysis of Non-Volatile Memory Technologies for Deep Learning Applications.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Chip-to-Chip Authentication Method Based on SRAM PUF and Public Key Cryptography.
J. Hardw. Syst. Secur., 2019

MANIC: A Vector-Dataflow Architecture for Ultra-Low-Power Embedded Systems.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

2018
Application and Product-Volume-Specific Customization of BEOL Metal Pitch.
IEEE Trans. Very Large Scale Integr. Syst., 2018

2017
Evaluating the benefits of relaxed BEOL pitch for deeply scaled ICs.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017


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