Mehdi Alipour

According to our database, Mehdi Alipour authored at least 19 papers between 2011 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2022

Dependence-aware Slice Execution to Boost MLP in Slice-out-of-order Cores.

Rakesh Kumar, Mehdi Alipour, David Black-Schaffer

ACM Trans. Archit. Code Optim., 2022

Freeway to Memory Level Parallelism in Slice-Out-of-Order Cores.

Rakesh Kumar, Mehdi Alipour, David Black-Schaffer

CoRR, 2022

2020

Rethinking Dynamic Instruction Scheduling and Retirement for Efficient Microarchitectures.

Mehdi Alipour

PhD thesis, 2020

Delay and Bypass: Ready and Criticality Aware Instruction Scheduling in Out-of-Order Processors.

Mehdi Alipour, Stefanos Kaxiras, David Black-Schaffer, Rakesh Kumar

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

2019

Maximizing Limited Resources: a Limit-Based Study and Taxonomy of Out-of-Order Commit.

Mehdi Alipour, Trevor E. Carlson, David Black-Schaffer, Stefanos Kaxiras

J. Signal Process. Syst., 2019

Freeway: Maximizing MLP for Slice-Out-of-Order Execution.

Rakesh Kumar, Mehdi Alipour, David Black-Schaffer

Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

FIFOrder MicroArchitecture: Ready-Aware Instruction Scheduling for OoO Processors.

Mehdi Alipour, Rakesh Kumar, Stefanos Kaxiras, David Black-Schaffer

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Ghost loads: what is the cost of invisible speculation?

Christos Sakalis, Mehdi Alipour, Alberto Ros, Alexandra Jimborean, Stefanos Kaxiras, Magnus Själander

Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

2018

Non-Speculative Load Reordering in Total Store Ordering.

Stefanos Kaxiras, Trevor E. Carlson, Mehdi Alipour, Alberto Ros

IEEE Micro, 2018

Constructing a Weak Memory Model.

Sizhuo Zhang, Muralidaran Vijayaraghavan, Andrew Wright, Mehdi Alipour, Arvind

Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

2017

A taxonomy of out-of-order instruction commit.

Mehdi Alipour, Trevor E. Carlson, Stefanos Kaxiras

Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017

Non-Speculative Load-Load Reordering in TSO.

Alberto Ros, Trevor E. Carlson, Mehdi Alipour, Stefanos Kaxiras

Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

Exploring the Performance Limits of Out-of-order Commit.

Mehdi Alipour, Trevor E. Carlson, Stefanos Kaxiras

Proceedings of the Computing Frontiers Conference, 2017

2012

Design Space Exploration to Find the Optimum Cache and Register File Size for Embedded Applications

Mehdi Alipour, Mostafa E. Salehi, Hesamodin Shojaei Baghini

CoRR, 2012

Performance-Optimum Superscalar Architecture for Embedded Applications

Mehdi Alipour, Mostafa E. Salehi

CoRR, 2012

Effect of Thread Level Parallelism on the Performance of Optimum Architecture for Embedded Applications

Mehdi Alipour, Hojjat Taghdisi

CoRR, 2012

Multi objective design space exploration of cache for embedded applications.

Mehdi Alipour, Hojjat Taghdisi, Seyed Hassan Sadeghzadeh

Proceedings of the 25th IEEE Canadian Conference on Electrical and Computer Engineering, 2012

2011

Performance per power optimum cache architecture for embedded applications, a design space exploration.

Mehdi Alipour, Kamran Moshari, Mohammad Reza Bagheri

Proceedings of the 2nd IEEE International Conference on Networked Embedded Systems for Enterprise Applications, 2011

Congestion and track usage improvement of large FPGAs using metro-on-FPGA methodology.

Mehdi Alipour, Mohammad Haji Seyed Javadi, Ali Jahanian

Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011