Md Farhadur Reza

According to our database, Md Farhadur Reza authored at least 19 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

High-performance application mapping in network-on-chip-based multicore systems.

Md Farhadur Reza

J. Supercomput., September, 2024

2023

Machine Learning Enabled Solutions for Design and Optimization Challenges in Networks-on-Chip based Multi/Many-Core Architectures.

Md Farhadur Reza

ACM J. Emerg. Technol. Comput. Syst., July, 2023

Heuristics-Enabled High-Performance Application Mapping in Network-on-Chip based Multicore Systems.

Md Farhadur Reza, Zachary McCloud

Proceedings of the IEEE International Conference on Omni-layer Intelligent Systems, 2023

2022

Deep Reinforcement Learning Enabled Self-Configurable Networks-on-Chip for High-Performance and Energy-Efficient Computing Systems.

Md Farhadur Reza

IEEE Access, 2022

2021

Energy-efficient task-resource co-allocation and heterogeneous multi-core NoC design in dark silicon era.

Md Farhadur Reza, Dan Zhao, Magdy A. Bayoumi

Microprocess. Microsystems, October, 2021

Deep Reinforcement Learning with Different Rewards for Scheduling in High-Performance Computing Systems.

Md Farhadur Reza, Bo Zhao

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Machine learning for design and optimization challenges in multi/many-core network-on-chip.

Md Farhadur Reza

Proceedings of the NoCArc '21: Proceedings of the 14th International Workshop on Network on Chip Architectures, Virtual Event, Greece, October 18, 2021

Reinforcement Learning for Runtime Optimization for High Performance and Energy Efficient NoC.

Md Farhadur Reza

Proceedings of the 18th International SoC Design Conference, 2021

Reinforcement Learning Enabled Routing for High-Performance Networks-on-Chip.

Md Farhadur Reza, Tung Thanh Le

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

Deep Reinforcement Learning for Self-Configurable NoC.

Md Farhadur Reza

Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

Reinforcement Learning based Dynamic Link Configuration for Energy-Efficient NoC.

Md Farhadur Reza

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019

Energy-efficient and high-performance NoC architecture and mapping solution for deep neural networks.

Md Farhadur Reza, Paul Ampadu

Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019

Approximate Communication Strategies for Energy-Efficient and High Performance NoC: Opportunities and Challenges.

Md Farhadur Reza, Paul Ampadu

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

2018

Hotspot-aware task-resource co-allocation for heterogeneous many-core networks-on-chip.

Md Farhadur Reza, Dan Zhao, Hongyi Wu, Magdy A. Bayoumi

Comput. Electr. Eng., 2018

Power- Thermal Aware Balanced Task-Resource Co-Allocation in Heterogeneous Many CPU-GPU Cores NoC in Dark Silicon Era.

Md Farhadur Reza, Dan Zhao, Magdy A. Bayoumi

Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

Neuro-NoC: Energy Optimization in Heterogeneous Many-Core NoC using Neural Networks in Dark Silicon Era.

Md Farhadur Reza, Tung Thanh Le, Bappaditya Dey, Magdy A. Bayoumi, Dan Zhao

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

DEC-NoC: An Approximate Framework Based on Dynamic Error Control with Applications to Energy-Efficient NoCs.

Yuechen Chen, Md Farhadur Reza, Ahmed Louri

Proceedings of the 36th IEEE International Conference on Computer Design, 2018

2017

Dark silicon-power-thermal aware runtime mapping and configuration in heterogeneous many-core NoC.

Md Farhadur Reza, Dan Zhao, Magdy A. Bayoumi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016

Task-Resource Co-Allocation for Hotspot Minimization in Heterogeneous Many-Core NoCs.

Md Farhadur Reza, Dan Zhao, Hongyi Wu

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016