Mayur Bubna

According to our database, Mayur Bubna authored at least 3 papers between 2008 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

HBIST: An approach towards zero external test cost.

Mayur Bubna, Kaushik Roy, Ashish Goel

Proceedings of the 30th IEEE VLSI Test Symposium, 2012

2008

An efficient greedy approach to PLA folding.

Mayur Bubna, Naresh Shenoy, Santanu Chattopadhyay

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A layout-aware physical design method for constructing feasible QCA circuits.

Mayur Bubna, Sudip Roy, Naresh Shenoy, Subhra Mazumdar

Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008