Mayank Kumar

Orcid: 0000-0001-9286-5666

Affiliations:
  • Adani Institute of Infrastructure Engineering, Ahmedabad, India
  • Motilal Nehru National Institute of Technology, Allahabad, India (PhD 2017)


According to our database1, Mayank Kumar authored at least 10 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of six.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

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Bibliography

2024
Detection and Localization of Open Switch Faults for Level-Shifted PWM Cascaded H-Bridge Inverter.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

2021
Open Circuit Fault Detection and Switch Identification for LS-PWM H-Bridge Inverter.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

A fault-diagnosis and tolerant control technique for five-level cascaded H-bridge inverters.
IET Circuits Devices Syst., 2021

2018
Time-Domain Characterization of Digitized PWM Inverter With Dead-Time Effect.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2017
Sampled-Time-Domain Analysis of a Digitally Implemented Current Controlled Inverter.
IEEE Trans. Ind. Electron., 2017

2016
Sampling Effect Characterization of Digital SPWM of VSI in Time Domain.
IEEE Trans. Ind. Electron., 2016

Stability and Sensitivity Analysis of Uniformly Sampled DC-DC Converter With Circuit Parasitics.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Sampled time domain analysis of digital pulse width modulation for feedback controlled converters.
IET Circuits Devices Syst., 2016

2015
Time-Domain Analysis of Sampling Effect in DPWM of DC-DC Converters.
IEEE Trans. Ind. Electron., 2015

A Novel Soft Switched Cycloinverter.
IEEE Trans. Ind. Electron., 2015


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