Maya H. Safieddine

Orcid: 0000-0002-1674-9628

According to our database1, Maya H. Safieddine authored at least 3 papers between 2015 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2019
Verification at RTL Using Separation of Design Concerns.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2016
Automated FPGA implementations of BIP designs.
Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016

2015
Separation of concerns for hardware components of embedded systems in BIP.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015


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