Maya B. Gokhale

Orcid: 0000-0003-4229-5735

Affiliations:
  • Lawrence Livermore National Laboratory, CA, USA
  • Los Alamos National Laboratory, NM, USA


According to our database1, Maya B. Gokhale authored at least 127 papers between 1986 and 2024.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
Disaggregated Memory with SmartNIC Offloading: a Case Study on Graph Processing.
CoRR, 2024

Multi-level Memory-Centric Profiling on ARM Processors with ARM SPE.
CoRR, 2024

Editor-in-Chief.
IEEE Access, 2024

Designing an Energy-Efficient Fully-Asynchronous Deep Learning Convolution Engine.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
Perspectives on AI Architectures and Co-design for Earth System Predictability.
CoRR, 2023

A Quantitative Approach for Adopting Disaggregated Memory in HPC Systems.
Proceedings of the International Conference for High Performance Computing, 2023

Accelerator integration in a tile-based SoC: lessons learned with a hardware floating point compression engine.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

SCCL: An open-source SystemC to RTL translator.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

2022
Enabling Scalable and Extensible Memory-Mapped Datastores in Userspace.
IEEE Trans. Parallel Distributed Syst., 2022

Metall: A persistent memory allocator for data-centric analytics.
Parallel Comput., 2022

FPGA-accelerated simulation of variable latency memory systems.
Proceedings of the 2022 International Symposium on Memory Systems, 2022

Evaluating Emerging CXL-enabled Memory Pooling for HPC Systems.
Proceedings of the IEEE/ACM Workshop on Memory Centric High Performance Computing, 2022

Benchmarking Test-Time Unsupervised Deep Neural Network Adaptation on Edge Devices.
Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022

AutoPager: Auto-tuning Memory-Mapped I/O Parameters in Userspace.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

ZHW: A Numerical CODEC for Big Data Scientific Computation.
Proceedings of the International Conference on Field-Programmable Technology, 2022

Unsupervised Test-Time Adaptation of Deep Neural Networks at the Edge: A Case Study.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
FPGA Computing.
IEEE Micro, 2021

Combining Emulation and Simulation to Evaluate a Near Memory Key/Value Lookup Accelerator.
CoRR, 2021

Semi-supervised on-device neural network adaptation for remote and portable laser-induced breakdown spectroscopy.
CoRR, 2021

A Holistic View of Memory Utilization on HPC Systems: Current and Future Trends.
Proceedings of the MEMSYS 2021: The International Symposium on Memory Systems, Washington, USA, September 27, 2021

2020
On the Memory Underutilization: Exploring Disaggregated Memory on HPC Systems.
Proceedings of the 32nd IEEE International Symposium on Computer Architecture and High Performance Computing, 2020

Demystifying the Performance of HPC Scientific Applications on NVM-based Memory Systems.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020

2019
Performance Assessment of Emerging Memories Through FPGA Emulation.
IEEE Micro, 2019

Guest Editorial: Special Issue on Reconfigurable Computing and FPGA Technology.
J. Parallel Distributed Comput., 2019

UMap: Enabling Application-driven Optimizations for Page Management.
Proceedings of the 2019 IEEE/ACM Workshop on Memory Centric High Performance Computing, 2019

Metall: A Persistent Memory Allocator Enabling Graph Processing.
Proceedings of the 9th IEEE/ACM Workshop on Irregular Applications: Architectures and Algorithms, 2019

Towards a scatter-gather architecture: hardware and software issues.
Proceedings of the International Symposium on Memory Systems, 2019

System evaluation of the Intel optane byte-addressable NVM.
Proceedings of the International Symposium on Memory Systems, 2019

Proceedings of the Operating Systems for Supercomputers and High Performance Computing, 2019

2018
Design space exploration of near memory accelerators.
Proceedings of the International Symposium on Memory Systems, 2018

Microscope on Memory: MPSoC-Enabled Computer Memory System Assessments.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

2017
Near memory key/value lookup acceleration.
Proceedings of the International Symposium on Memory Systems, 2017

Performance Evaluation of Scale-Free Graph Algorithms in Low Latency Non-volatile Memory.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Argo NodeOS: Toward Unified Resource Management for Exascale.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium, 2017

Accelerating Big Data Infrastructure and Applications (Ongoing Collaboration).
Proceedings of the 37th IEEE International Conference on Distributed Computing Systems Workshops, 2017

2016
Graph colouring as a challenge problem for dynamic graph processing on distributed systems.
Proceedings of the International Conference for High Performance Computing, 2016

Evaluating the feasibility of storage class memory as main memory.
Proceedings of the Second International Symposium on Memory Systems, 2016

RRAM-based TCAMs for pattern search.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Towards a Distributed Large-Scale Dynamic Graph Data Store.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

ClearView: Data cleaning for online review mining.
Proceedings of the 2016 IEEE/ACM International Conference on Advances in Social Networks Analysis and Mining, 2016

2015
In-Memory Data Rearrangement for Irregular, Data-Intensive Computing.
Computer, 2015

DI-MMAP - a scalable memory-map runtime for out-of-core data-intensive applications.
Clust. Comput., 2015

Hybrid memory cube performance characterization on data-centric workloads.
Proceedings of the 5th Workshop on Irregular Applications - Architectures and Algorithms, 2015

Message from chairs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Near memory data structure rearrangement.
Proceedings of the 2015 International Symposium on Memory Systems, 2015

A Container-Based Approach to OS Specialization for Exascale Computing.
Proceedings of the 2015 IEEE International Conference on Cloud Engineering, 2015

2014
Faster Parallel Traversal of Scale Free Graphs at Extreme Scale with Vertex Delegates.
Proceedings of the International Conference for High Performance Computing, 2014

Multi-threaded streamline tracing for data-intensive architectures.
Proceedings of the 4th IEEE Symposium on Large Data Analysis and Visualization, 2014

RAW 2014 Keynotes.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Design and Optimization of a Metagenomics Analysis Workflow for NVRAM.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

2013
QMDS: a file system metadata management service supporting a graph data model-based query language.
Int. J. Parallel Emergent Distributed Syst., 2013

Scalable metagenomic taxonomy classification using a reference genome database.
Bioinform., 2013

Keynote 3 - Extreme scale challenges: Can reconfigurable computing come to the rescue?
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Scaling Techniques for Massive Scale-Free Graphs in Distributed (External) Memory.
Proceedings of the 27th IEEE International Symposium on Parallel and Distributed Processing, 2013

Minerva: Accelerating Data Analysis in Next-Generation SSDs.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

2012
DI-MMAP: A High Performance Memory-Map Runtime for Data-Intensive Applications.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012

On the Role of NVRAM in Data-intensive Architectures: An Evaluation.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012

Integrated in-system storage architecture for high performance computing.
Proceedings of the 2nd International Workshop on Runtime and Operating Systems for Supercomputers, 2012

Accelerating a Random Forest Classifier: Multi-Core, GP-GPU, or FPGA?
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011
Massively parallel acceleration of a document-similarity classifier to detect web attacks.
J. Parallel Distributed Comput., 2011

Poster: FOX: a fault-oblivious extreme scale execution environment.
Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis, 2011

2010
Multithreaded Asynchronous Graph Traversal for In-Memory and Semi-External Memory.
Proceedings of the Conference on High Performance Computing Networking, 2010

A configurable-hardware document-similarity classifier to detect web attacks.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

FPGA Based Network Traffic Analysis Using Traffic Dispersion Patterns.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Real-Time Classification of Multimedia Traffic Using FPGA.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009
Application Experiments: MPPA and FPGA.
Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009

2008
Instruction Sets.
Proceedings of the Wiley Encyclopedia of Computer Science and Engineering, 2008

A Case Study of Hardware/Software Partitioning of Traffic Simulation on the Cray XD1.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Accelerating Molecular Dynamics Simulations with Reconfigurable Computers.
IEEE Trans. Parallel Distributed Syst., 2008

Hardware Technologies for High-Performance Data-Intensive Computing.
Computer, 2008

2007
Reliability Analysis of Large Circuits Using Scalable Techniques and Tools.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

A reconfigurable computing framework for multi-scale cellular image processing.
Microprocess. Microsystems, 2007

Comparison of feature selection and classification algorithms in identifying malicious executables.
Comput. Stat. Data Anal., 2007

Trident: From High-Level Language to Hardware Circuitry.
Computer, 2007

Scalable techniques and tools for reliability analysis of large circuits.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Language classification using n-grams accelerated by FPGA-based Bloom filters.
Proceedings of the 1st international workshop on High-performance reconfigurable computing technology and applications, 2007

Matched Filter Computation on FPGA, Cell and GPU.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

On the Acceleration of Shortest Path Calculations in Transportation Networks.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

2006
Dynamic reconfiguration for management of radiation-induced faults in FPGAs.
Int. J. Embed. Syst., 2006

Panel: Nano-computing - do we need new formal approaches?
Proceedings of the 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 2006

RAW keynote 1: the outer limits: reconfigurable computing in space and in orbit.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

The STAR-C Truth: Analyzing Reconfigurable Supercomputing Reliability.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

A Programmable, Maximal Throughput Architecture for Neighborhood Image Processing.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

Promises and Pitfalls of Reconfigurable Supercomputing.
Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2006

A Run-Time Re-configurable Parametric Architecture for Local Neighborhood Image Processing.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

A hybrid framework for design and analysis of fault-tolerant architectures.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Partitioning Hardware and Software for Reconfigurable Supercomputing Applications: A Case Study.
Proceedings of the ACM/IEEE SC2005 Conference on High Performance Networking and Computing, 2005

Trident: An FPGA Compiler Framework for Floating-Point Algorithms.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Metropolitan Road Traffic Simulation on FPGAs.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

Detecting a malicious executable without prior knowledge of its patterns.
Proceedings of the Data Mining, 2005

2004
Monte Carlo Radiative Heat Transfer Simulation on a Reconfigurable Computer.
Proceedings of the Field Programmable Logic and Application, 2004

A constraints programming approach to communication scheduling on SoPC architectures.
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

Communications Scheduling for Concurrent Processes on Reconfigurable Computers.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

2003
Experience with a Hybrid Processor: K-Means Clustering.
J. Supercomput., 2003

Polymorphous fabric-based systems: Model, tools, applications.
J. Syst. Archit., 2003

Optimizing Digital Hardware Perceptrons for Multi-Spectral Image Classification.
J. Math. Imaging Vis., 2003

Fabric-Based Systems: Model, Tools, Applications.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

Gamma-Ray Pulsar Detection using Reconfigurable Computing Hardware.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

A Preliminary Study of Molecular Dynamics on Reconfigurable Computers.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

2002
A Polymorphous Computing Fabric.
IEEE Micro, 2002

Granidt: Towards Gigabit Rate Network Intrusion Detection Technology.
Proceedings of the Field-Programmable Logic and Applications, 2002

2001
Mutable Functional Units and Their Applications on Microprocessors.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

Evaluation of the streams-C C-to-FPGA compiler: an applications perspective.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2001

Mutable Functional Units: Initial Results.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

Evolving Network Architectures With Custom Computers For Multi-Spectral Feature Identification.
Proceedings of the 3rd NASA / DoD Workshop on Evolvable Hardware (EH 2001), 2001

2000
Co-Synthesis to a Hybrid RISC/FPGA Architecture.
J. VLSI Signal Process., 2000

Interfacing interpreted and compiled languages to support applications on a massively parallel network of workstations (MP-NOW).
Clust. Comput., 2000

Stream-Oriented FPGA Computing in the Streams-C High Level Language.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

1999
Automatic Allocation of Arrays to Memories in FPGA Processors with Multiple Memory Banks.
Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

1998
The NAPA Adaptive Processing Architecture.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

NAPA C: Compiling for a Hybrid RISC/FPGA Architecture.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1997
High level compilation for fine grained FPGAs.
Proceedings of the 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 1997

1995
Data-parallel C on a reconfigurable logic array.
J. Supercomput., 1995

Processing in Memory: The Terasys Massively Parallel PIM Array.
Computer, 1995

Automatic Synthesis of Parallel Programs Targeted to Dynamically Reconfigurable Logic Arrays.
Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995

1993
SIMD Optimizations in a Data Parallel C.
Proceedings of the 1993 International Conference on Parallel Processing, 1993

1992
Parallel Evaluation of Attribute Grammars.
IEEE Trans. Parallel Distributed Syst., 1992

An introduction to compilation issues for parallel machines.
J. Supercomput., 1992

1991
Building and Using a Highly Parallel Programmable Logic Array.
Computer, 1991

1990
SPLASH: A Reconfigurable Linear Logic Array.
Proceedings of the 1990 International Conference on Parallel Processing, 1990

The Logic Description Generator.
Proceedings of the Application Specific Array Processors, 1990

1988
Parallel Scheduling of Recursively Defined Arrays.
J. Symb. Comput., 1988

The symbolic hyperplane transformation for recursively defined arrays.
Proceedings of the Proceedings Supercomputing '88, Orlando, FL, USA, November 12-17, 1988, 1988

1987
Exploiting Loop Level Parallelism in Nonprocedural Dataflow Programs.
Proceedings of the International Conference on Parallel Processing, 1987

Algorithm specification in a very high level language.
Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow, 1987

1986
Macro vs. Micro Dataflow: A Programming Example.
Proceedings of the International Conference on Parallel Processing, 1986


  Loading...